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Results 61 - 70 of 225 for MOVW (0.03 sec)

  1. src/runtime/sys_linux_arm64.s

    	MOVD	$AT_FDCWD, R0
    	MOVD	name+0(FP), R1
    	MOVW	mode+8(FP), R2
    	MOVW	perm+12(FP), R3
    	MOVD	$SYS_openat, R8
    	SVC
    	CMN	$4095, R0
    	BCC	done
    	MOVW	$-1, R0
    done:
    	MOVW	R0, ret+16(FP)
    	RET
    
    TEXT runtime·closefd(SB),NOSPLIT|NOFRAME,$0-12
    	MOVW	fd+0(FP), R0
    	MOVD	$SYS_close, R8
    	SVC
    	CMN	$4095, R0
    	BCC	done
    	MOVW	$-1, R0
    done:
    	MOVW	R0, ret+8(FP)
    	RET
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Mar 24 18:53:44 UTC 2023
    - 16.7K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/mips64.s

    	MOVV	HI, R1		// 00000810
    	MOVV	R1, LO		// 00200013
    	MOVV	R1, HI		// 00200011
    
    
    //	LMOVW rreg ',' rreg
    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    	MOVW	R1, R2		// 00011004
    	MOVW	LO, R1		// 00000812
    	MOVW	HI, R1		// 00000810
    	MOVW	R1, LO		// 00200013
    	MOVW	R1, HI		// 00200011
    	MOVWU	R14, R27	// 000ed83c001bd83e
    
    //	LMOVH rreg ',' rreg
    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 12.4K bytes
    - Viewed (0)
  3. src/internal/runtime/atomic/atomic_arm.s

    TEXT armCas64<>(SB),NOSPLIT,$0-21
    	// addr is already in R1
    	MOVW	old_lo+4(FP), R2
    	MOVW	old_hi+8(FP), R3
    	MOVW	new_lo+12(FP), R4
    	MOVW	new_hi+16(FP), R5
    cas64loop:
    	LDREXD	(R1), R6	// loads R6 and R7
    	CMP	R2, R6
    	BNE	cas64fail
    	CMP	R3, R7
    	BNE	cas64fail
    
    	DMB	MB_ISHST
    
    	STREXD	R4, (R1), R0	// stores R4 and R5
    	CMP	$0, R0
    	BNE	cas64loop
    	MOVW	$1, R0
    
    	DMB	MB_ISH
    
    	MOVBU	R0, swapped+20(FP)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 25 19:53:03 UTC 2024
    - 5.7K bytes
    - Viewed (0)
  4. src/internal/bytealg/equal_arm.s

    TEXT runtime·memequal(SB),NOSPLIT|NOFRAME,$0-13
    	MOVW	a+0(FP), R0
    	MOVW	b+4(FP), R2
    	CMP	R0, R2
    	B.EQ	eq
    	MOVW	size+8(FP), R1
    	CMP	$0, R1
    	B.EQ	eq		// short path to handle 0-byte case
    	MOVW	$ret+12(FP), R7
    	B	memeqbody<>(SB)
    eq:
    	MOVW	$1, R0
    	MOVB	R0, ret+12(FP)
    	RET
    
    // memequal_varlen(a, b unsafe.Pointer) bool
    TEXT runtime·memequal_varlen(SB),NOSPLIT|NOFRAME,$0-9
    	MOVW	a+0(FP), R0
    	MOVW	b+4(FP), R2
    	CMP	R0, R2
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Apr 24 00:56:36 UTC 2019
    - 1.8K bytes
    - Viewed (0)
  5. src/internal/runtime/atomic/sys_linux_arm.s

    TEXT memory_barrier<>(SB),NOSPLIT|NOFRAME,$0
    	MOVW	$0xffff0fa0, R15 // R15 is hardware PC.
    
    TEXT	·Load(SB),NOSPLIT,$0-8
    	MOVW	addr+0(FP), R0
    	MOVW	(R0), R1
    
    	MOVB	runtime·goarm(SB), R11
    	CMP	$7, R11
    	BGE	native_barrier
    	BL	memory_barrier<>(SB)
    	B	end
    native_barrier:
    	DMB	MB_ISH
    end:
    	MOVW	R1, ret+4(FP)
    	RET
    
    TEXT	·Store(SB),NOSPLIT,$0-8
    	MOVW	addr+0(FP), R1
    	MOVW	v+4(FP), R2
    
    	MOVB	runtime·goarm(SB), R8
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 25 19:53:03 UTC 2024
    - 2.8K bytes
    - Viewed (0)
  6. src/internal/bytealg/indexbyte_arm.s

    #include "go_asm.h"
    #include "textflag.h"
    
    TEXT ·IndexByte(SB),NOSPLIT,$0-20
    	MOVW	b_base+0(FP), R0
    	MOVW	b_len+4(FP), R1
    	MOVBU	c+12(FP), R2	// byte to find
    	MOVW	$ret+16(FP), R5
    	B	indexbytebody<>(SB)
    
    TEXT ·IndexByteString(SB),NOSPLIT,$0-16
    	MOVW	s_base+0(FP), R0
    	MOVW	s_len+4(FP), R1
    	MOVBU	c+8(FP), R2	// byte to find
    	MOVW	$ret+12(FP), R5
    	B	indexbytebody<>(SB)
    
    // input:
    //  R0: data
    //  R1: data length
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 18 07:37:13 UTC 2019
    - 951 bytes
    - Viewed (0)
  7. src/internal/bytealg/indexbyte_mipsx.s

    	RET
    
    TEXT ·IndexByteString(SB),NOSPLIT,$0-16
    	MOVW	s_base+0(FP), R1
    	MOVW	s_len+4(FP), R2
    	MOVBU	c+8(FP), R3	// byte to find
    	ADDU	$1, R1, R4	// store base+1 for later
    	ADDU	R1, R2	// end
    
    loop:
    	BEQ	R1, R2, notfound
    	MOVBU	(R1), R5
    	ADDU	$1, R1
    	BNE	R3, R5, loop
    
    	SUBU	R4, R1	// remove (base+1)
    	MOVW	R1, ret+12(FP)
    	RET
    
    notfound:
    	MOVW	$-1, R1
    	MOVW	R1, ret+12(FP)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Nov 06 10:24:44 UTC 2021
    - 1012 bytes
    - Viewed (0)
  8. src/runtime/memclr_mipsx.s

    	SUBU	R5, R4, R5	// end pointer for 4-byte chunks
    
    large:
    	BEQ	R1, R6, words
    	MOVW	R0, 0(R1)
    	MOVW	R0, 4(R1)
    	MOVW	R0, 8(R1)
    	MOVW	R0, 12(R1)
    	MOVW	R0, 16(R1)
    	MOVW	R0, 20(R1)
    	MOVW	R0, 24(R1)
    	MOVW	R0, 28(R1)
    	ADDU	$32, R1
    	JMP	large
    
    words:
    	BEQ	R1, R5, tail
    	MOVW	R0, 0(R1)
    	ADDU	$4, R1
    	JMP	words
    
    tail:
    	BEQ	R1, R4, ret
    	MOVWLO	R0, -1(R4)
    
    ret:
    	RET
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Nov 06 10:24:44 UTC 2021
    - 1.3K bytes
    - Viewed (0)
  9. src/internal/bytealg/equal_mipsx.s

    TEXT runtime·memequal(SB),NOSPLIT,$0-13
    	MOVW	a+0(FP), R1
    	MOVW	b+4(FP), R2
    	BEQ	R1, R2, eq
    	MOVW	size+8(FP), R3
    	ADDU	R1, R3, R4
    loop:
    	BNE	R1, R4, test
    	MOVW	$1, R1
    	MOVB	R1, ret+12(FP)
    	RET
    test:
    	MOVBU	(R1), R6
    	ADDU	$1, R1
    	MOVBU	(R2), R7
    	ADDU	$1, R2
    	BEQ	R6, R7, loop
    
    	MOVB	R0, ret+12(FP)
    	RET
    eq:
    	MOVW	$1, R1
    	MOVB	R1, ret+12(FP)
    	RET
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Nov 06 10:24:44 UTC 2021
    - 1.1K bytes
    - Viewed (0)
  10. src/crypto/md5/md5block_arm64.s

    	LDPW	(1*8)(R0), (R6, R7)
    
    loop:
    	MOVW	R4, R12
    	MOVW	R5, R13
    	MOVW	R6, R14
    	MOVW	R7, R15
    
    	MOVW	(0*4)(R1), R8
    	MOVW	R7, R9
    
    #define ROUND1(a, b, c, d, index, const, shift) \
    	ADDW	$const, a; \
    	ADDW	R8, a; \
    	MOVW	(index*4)(R1), R8; \
    	EORW	c, R9; \
    	ANDW	b, R9; \
    	EORW	d, R9; \
    	ADDW	R9, a; \
    	RORW	$(32-shift), a; \
    	MOVW	c, R9; \
    	ADDW	b, a
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 4.1K bytes
    - Viewed (0)
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