·p256MovCond(SB),NOSPLIT,$0 MOVD res+0(FP), res_ptr MOVD a+8(FP), a_ptr MOVD b+16(FP), b_ptr MOVD cond+24(FP), R3 CMP $0, R3 // Two remarks: // 1) Will want to revisit NEON, when support is better // 2) CSEL might not be constant time on all ARM processors LDP 0*16(a_ptr), (R4, R5) LDP 1*16(a_ptr), (R6, R7) LDP 2*16(a_ptr), (R8, R9) LDP 0*16(b_ptr), (R16, R17) LDP 1*16(b_ptr), (R19, R20) LDP 2*16(b_ptr), (R21, R22) CSEL EQ, R16, R4, R4 CSEL EQ, R17, R5, R5 CSEL EQ, R19, R6, R6 CSEL EQ, R20, R7, R7...