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Results 31 - 35 of 35 for asm (0.05 sec)
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go.sum
github.com/secure-io/sio-go v0.3.1 h1:dNvY9awjabXTYGsTF1PiCySl9Ltofk9GA3VdWlo7rRc= github.com/secure-io/sio-go v0.3.1/go.mod h1:+xbkjDzPjwh4Axd07pRKSNriS9SCiYksWnZqdnfpQxs= github.com/segmentio/asm v1.2.0 h1:9BQrFxC+YOHJlTlHGkTrFWf59nbL3XnCoFLTwDCI7ys= github.com/segmentio/asm v1.2.0/go.mod h1:BqMnlJP91P8d+4ibuonYZw9mfnzI9HfxselHZr5aAcs= github.com/shirou/gopsutil/v3 v3.24.5 h1:i0t8kL+kQTvpAYToeuiVk3TgDeKOFioZO3Ztz/iZ9pI=
Registered: Sun Sep 07 19:28:11 UTC 2025 - Last Modified: Sat Sep 06 17:33:19 UTC 2025 - 79.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm.s
ADD $1, R2, R3 ADD R1<<R2, R3, R4 ADD R1>>R2, R3, R4 ADD R1@>R2, R3, R4 ADD R1->R2, R3, R4 ADD R1, R2, R3 ADD R(1)<<R(2), R(3), R(4) // ADD R1<<R2, R3, R4 // LTYPE1 cond imsr ',' spreg ',' // asm doesn't support trailing comma. // { // outcode($1, $2, &$3, $5, &nullgen); // } // LTYPE1 cond imsr ',' reg // { // outcode($1, $2, &$3, 0, &$5); // } ADD $1, R2 ADD R1<<R2, R3 ADD R1>>R2, R3
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Fri Dec 15 20:51:01 UTC 2023 - 69K bytes - Viewed (0) -
fess-crawler/src/main/resources/org/codelibs/fess/crawler/mime/tika-mimetypes.xml
<glob pattern="*.aj"/> <sub-class-of type="text/plain"/> </mime-type> <mime-type type="text/x-assembly"> <alias type="text/x-asm"/> <_comment>Assembler source code</_comment> <glob pattern="*.s"/> <glob pattern="*.S"/> <glob pattern="*.asm"/> <sub-class-of type="text/plain"/> </mime-type> <mime-type type="text/calendar"> <magic priority="50">
Registered: Sun Sep 21 03:50:09 UTC 2025 - Last Modified: Thu Mar 13 08:18:01 UTC 2025 - 320.1K bytes - Viewed (1) -
lib/fips140/v1.0.0.zip
$.Key}}.B16, V{{ block_reg $i }}.B16 {{- if $.WithMc }} AESMC V{{ block_reg $i }}.B16, V{{ block_reg $i }}.B16 {{- end }} {{ end }} {{ end }} {{ range $N := $.Sizes }} // func ctrBlocks{{$N}}Asm(nr int, xk *[60]uint32, dst *[{{$N}}*16]byte, src *[{{$N}}*16]byte, ivlo uint64, ivhi uint64) TEXT ·ctrBlocks{{ $N }}Asm(SB),NOSPLIT,$0 MOVD nr+0(FP), NR MOVD xk+8(FP), XK MOVD dst+16(FP), DST MOVD src+24(FP), SRC MOVD ivlo+32(FP), IV_LOW_LE MOVD ivhi+40(FP), IV_HIGH_LE {{/* Prepare plain from IV and blockIndex....
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Jan 29 15:10:35 UTC 2025 - 635K bytes - Viewed (0) -
CREDITS
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ================================================================ github.com/segmentio/asm https://github.com/segmentio/asm ---------------------------------------------------------------- MIT License Copyright (c) 2021 Segment Permission is hereby granted, free of charge, to any person obtaining a copy
Registered: Sun Sep 07 19:28:11 UTC 2025 - Last Modified: Thu Mar 13 05:29:51 UTC 2025 - 1.8M bytes - Viewed (0)