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Results 31 - 40 of 256 for art3 (0.15 sec)

  1. src/crypto/md5/gen.go

    		// round 1
    		{{range $i, $s := dup 4 .Shift1 -}}
    			{{printf "arg0 = arg1 + bits.RotateLeft32((((arg2^arg3)&arg1)^arg3)+arg0+x%x+%#08x, %d)" (idx 1 $i) (index $.Table1 $i) $s | relabel}}
    			{{rotate -}}
    		{{end}}
    
    		// round 2
    		{{range $i, $s := dup 4 .Shift2 -}}
    			{{printf "arg0 = arg1 + bits.RotateLeft32((((arg1^arg2)&arg3)^arg2)+arg0+x%x+%#08x, %d)" (idx 2 $i) (index $.Table2 $i) $s | relabel}}
    			{{rotate -}}
    		{{end}}
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 13 18:57:38 UTC 2024
    - 4.7K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/lite/tests/ops.mlir

      %0:1 = "tfl.while"(%arg0, %arg1) ({
      ^bb0(%arg2: tensor<*xi32>, %arg3: tensor<*xf32>):
        %1 = func.call @WhileOp_cond(%arg2, %arg3) : (tensor<*xi32>, tensor<*xf32>) -> tensor<i1>
        "tfl.yield"(%1) : (tensor<i1>) -> ()
      },  {
      ^bb0(%arg2: tensor<*xi32>, %arg3: tensor<*xf32>):
        %1:2 = func.call @WhileOp_body(%arg2, %arg3) : (tensor<*xi32>, tensor<*xf32>) -> (tensor<*xi32>, tensor<*xf32>)
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jun 06 19:09:08 UTC 2024
    - 189.2K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/tensorflow/tests/tpu-variable-runtime-reformatting.mlir

      // CHECK-SAME: %[[ARG3:.*]]: tensor<*x!tf_type.resource<tensor<3x3x1x32xf32>>> {tf.device = "/device:TPU:1"})
      func.func @main(%arg0: !tf_res_f32 {tf.device = "/device:TPU:0"},
                 %arg1: !tf_res_f32 {tf.device = "/device:TPU:1"},
                 %arg2: !tf_res_md_f32 {tf.device = "/device:TPU:0"},
                 %arg3: !tf_res_md_f32 {tf.device = "/device:TPU:1"}) {
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Oct 31 08:59:10 UTC 2023
    - 25.4K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/lite/tests/end2end/custom_opdef.pbtxt

    # CHECK-NEXT: %[[CUSTOM:.*]] = "tfl.custom_tf"(%arg0, %arg1) ({
    # CHECK-NEXT: ^bb0(%arg2: tensor<4xi32>, %arg3: tensor<4xi32>):
    # CHECK-NEXT:   %[[OUTPUTS:.*]] = "tf.BannaPotatoSaladWithColeslaw"(%arg2, %arg3) {T = i32, device = ""} : (tensor<4xi32>, tensor<4xi32>) -> tensor<*xi32>
    # CHECK-NEXT:   "tfl.yield"(%[[OUTPUTS]]) : (tensor<*xi32>) -> ()
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Jan 21 11:04:11 UTC 2022
    - 1.4K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/lite/tests/mlir2flatbuffer/svdf_v2.mlir

    // CHECK-NEXT:   }
    // CHECK-EMPTY:
    
    ^bb0(%arg0: tensor<4 x f32>, %arg1: tensor<4 x i8>, %arg2: tensor<4 x f32>, %arg3: tensor<4 x f32>):
      %0 = "tfl.pseudo_const" () {value = dense<0.0> : tensor<4xf32>} : () -> tensor<4xf32> loc("Const")
      %1 = "tfl.svdf"(%arg0, %arg1, %arg2, %arg3, %0) {fused_activation_function = "RELU", rank = 2 : i32} : (tensor<4xf32>, tensor<4xi8>, tensor<4xf32>, tensor<4xf32>, tensor<4xf32>) -> tensor<4xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jul 14 16:41:28 UTC 2022
    - 3.7K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/vhlo.mlir

      %0 = "vhlo.dynamic_update_slice_v1"(%arg0, %arg1, %arg2, %arg3) : (tensor<4x4xi64>, tensor<2x3xi64>, tensor<i64>, tensor<i64>) -> tensor<4x4xi64>
      return %0 : tensor<4x4xi64>
    }
    
    //CHECK:func.func private @dynamic_update_slice(%arg0: tensor<4x4xi64>, %arg1: tensor<2x3xi64>, %arg2: tensor<i64>, %arg3: tensor<i64>) -> tensor<4x4xi64> {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Mar 14 19:15:40 UTC 2024
    - 31.9K bytes
    - Viewed (1)
  7. tensorflow/compiler/mlir/lite/tests/prepare-tf-with-allowing-bf16-and-f16-type-legalization.mlir

    }
    
    // CHECK-LABEL: fused_batch_norm_v3_bf16
    func.func @fused_batch_norm_v3_bf16(%arg0: tensor<8x8x8x8xbf16>, %arg1: tensor<8xf32>, %arg2: tensor<8xf32>, %arg3: tensor<8xf32>, %arg4: tensor<8xf32>) -> tensor<8x8x8x8xbf16> {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 26 23:53:32 UTC 2022
    - 2.2K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/lite/stablehlo/tests/legalize-stablehlo-vhlo.mlir

    func.func @op_with_region(%arg0: tensor<1x16x16x320xf32>, %arg1: tensor<f32>) -> tensor<1x320xf32> {
      // CHECK:      %0 = "vhlo.reduce_v1"(%arg0, %arg1) <{{.*}}> ({
      // CHECK-NEXT:  ^bb0(%arg2: tensor<f32>, %arg3: tensor<f32>):
      // CHECK-NEXT:    %1 = "vhlo.add_v1"(%arg2, %arg3) : (tensor<f32>, tensor<f32>) -> tensor<f32>
      // CHECK-NEXT:    "vhlo.return_v1"(%1) : (tensor<f32>) -> ()
      // CHECK-NEXT: }) : (tensor<1x16x16x320xf32>, tensor<f32>) -> tensor<1x320xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Mar 07 22:39:35 UTC 2024
    - 5.7K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/tensorflow/tests/check_control_dependencies.mlir

      %arg2: tensor<!tf_type.resource<tensor<f32>>>,
      %arg3: tensor<f32>) -> () {
      tf_executor.graph {
        // expected-warning@+2 {{unexpected control dependency path: path 0, node 0 (source)}}
        // expected-warning@+1 {{unexpected control dependency path: path 1, node 0 (source)}}
        %island1 = tf_executor.island {
          "tf.AssignVariableOp"(%arg0, %arg3) : (tensor<!tf_type.resource<tensor<f32>>>, tensor<f32>) -> ()
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Aug 31 16:14:07 UTC 2022
    - 8K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/tfrt/tests/mlrt/async_while.mlir

      // CHECK-NEXT: %1:10 = tf_mlrt.tf_async_while @"sort_map/while_body/TfMlrtAsyncWhileBody"(%0, %cst, %arg3, %arg3, %arg0, %arg1, %arg2, %arg1, %arg2, %arg4) {invariant_size = 6 : i32} : (tensor<i1>, tensor<i32>, tensor<3x3xf32>, tensor<3x3xf32>, tensor<i32>, tensor<?x!tf_type.resource>, tensor<*xf32>, tensor<?x!tf_type.resource>, tensor<*xf32>, tensor<i32>)...
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 22.2K bytes
    - Viewed (0)
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