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Results 21 - 23 of 23 for Operands (0.06 sec)

  1. src/cmd/asm/internal/asm/testdata/arm.s

    #include "../../../../../runtime/textflag.h"
    
    TEXT	foo(SB), DUPOK|NOSPLIT, $0
    
    // ADD
    //
    //	LTYPE1 cond imsr ',' spreg ',' reg
    //	{
    //		outcode($1, $2, &$3, $5, &$7);
    //	}
    // Cover some operand space here too.
    	ADD	$1, R2, R3
    	ADD	R1<<R2, R3, R4
    	ADD	R1>>R2, R3, R4
    	ADD	R1@>R2, R3, R4
    	ADD	R1->R2, R3, R4
    	ADD	R1, R2, R3
    	ADD	R(1)<<R(2), R(3), R(4) // ADD	R1<<R2, R3, R4
    
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Dec 15 20:51:01 UTC 2023
    - 69K bytes
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  2. doc/asm.html

    Thus <code>-2</code> is not the integer value minus two,
    but the unsigned 64-bit integer with the same bit pattern.
    The distinction rarely matters but
    to avoid ambiguity, division or right shift where the right operand's
    high bit is set is rejected.
    </p>
    
    <h3 id="symbols">Symbols</h3>
    
    <p>
    Some symbols, such as <code>R1</code> or <code>LR</code>,
    are predefined and refer to registers.
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Nov 28 19:15:27 UTC 2023
    - 36.3K bytes
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  3. RELEASE.md

            be accelerated.
        *   Fix segmentation fault when running a model with LSTM nodes using
            `NNAPI` Delegate
        *   Fix `NNAPI` delegate failure when an operand for Maximum/Minimum
            operation is a scalar.
        *   Fix `NNAPI` delegate failure when Axis input for reduce operation is a
            scalar.
    Registered: Tue Nov 05 12:39:12 UTC 2024
    - Last Modified: Tue Oct 22 14:33:53 UTC 2024
    - 735.3K bytes
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