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tensorflow/compiler/mlir/g3doc/dialects.md
including: * TensorFlow IR, which represents all things possible in TensorFlow graphs. * XLA HLO IR, which is designed to take advantage of XLA’s compilation abilities (with output to, among other things, TPUs). * An experimental affine dialect, which focuses on [polyhedral representations](https://en.wikipedia.org/wiki/Polytope_model) and optimizations. * LLVM IR, which has a 1:1 mapping between it and LLVM’s own representation,
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Feb 21 01:37:38 UTC 2020 - 1.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/cc/weight_only_ptq.cc
WeightOnlyPtqComponent::kName, *function_aliases, *ctx, *module)); // Remove the `tpu` tag for exporting because the output quantized model is // essentially a CPU model. tags.erase("tpu"); py_function_library.SaveExportedModel( dst_saved_model_path, post_calibrated_exported_model, src_saved_model_path, tags, signature_def_map);
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 03 02:59:01 UTC 2024 - 5.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/utils/xla_sharding_util.cc
return builder->create<mlir::TF::ConcatOp>( location, output_type, concat_dimension_op.getOutput(), inputs); } // For tile sharded inputs to TPU computation, inject split op between the // input values and TPU computation so that tiled input values are passed in // as inputs to TPU computations. If more than one dimension is sharded, then // a tree of connected split ops are added before tf_device.parallel_execute op.
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 22 21:28:13 UTC 2024 - 34K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/reducer/unsupported-op-test.sh
# Script for mlir-reduce to test input interestingness. tf-opt $1 -tf-mark-ops-for-outside-compilation &> | grep "'tf.UnsupportedOp' op isn't compilable for TPU device" if [ $? -eq 0 ]; then exit 1 else exit 0
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 29 09:41:12 UTC 2021 - 920 bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/cc/static_range_ptq.cc
PostCalibrationComponent::kName, *function_aliases, *ctx, *module)); // Remove the `tpu` tag for exporting because the output quantized model is // essentially a CPU model. tags.erase("tpu"); py_function_library.SaveExportedModel( dst_saved_model_path, post_calibrated_exported_model, src_saved_model_path, tags, signature_def_map);
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Apr 24 12:49:45 UTC 2024 - 6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/testdata/spmd.mlir
"tf_device.cluster_func"(%arg0) <{func = @empty_func}> {_dynamic_arg_index = [], _replication_info = "cluster", _xla_compile_device_type = "TPU", allow_soft_placement = false, computation_shape = [], device = "", device_assignment = [0, 0, 0, 0, 0, 0, 0, 1], host_compute_core = [], input_sharding_configuration = ["{devices=[2,1]0,1}"], num_cores_per_replica = 2 : i64, output_sharding_configuration...
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Dec 12 04:22:33 UTC 2023 - 1.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tpu_colocate_composite_resource_ops.mlir
// RUN: tf-opt %s -tf-tpu-colocate-composite-resource-ops | FileCheck %s // Tests ReadVariable op using composite device resource is wrapped inside // tf_device.Cluster. // CHECK-LABEL: func @testReadVariableOpColocated // CHECK-SAME: (%[[ARG0:.*]]: tensor<*x!tf_type.resource<tensor<4xf32>>>) func.func @testReadVariableOpColocated(%arg0: tensor<*x!tf_type.resource<tensor<4xf32>>>) { // CHECK: tf_device.replicate
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Oct 31 08:59:10 UTC 2023 - 6.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/move_tpu_compile_to_front.mlir
// RUN: tf-opt %s -allow-unregistered-dialect --tf-move-tpu-compile-to-front --split-input-file | FileCheck %s module { // CHECK-LABEL: does_basic_reordering func.func @does_basic_reordering() -> () { // CHECK: _TPUCompileMlir // CHECK-SAME: X // CHECK: _TPUCompileMlir // CHECK-SAME: Y // CHECK: OpA // CHECK: OpB // CHECK: OpC "tf.OpA"() : () -> ()
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Oct 17 00:26:18 UTC 2023 - 1.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/set_tpu_infeed_layout.h
#include "mlir/IR/OwningOpRef.h" // from @llvm-project namespace mlir { // Set layouts attribute of tf.InfeedDequeueTuple ops. bool SetTPUInfeedLayout(OwningOpRef<ModuleOp>& mlir_module); // Try to determine the right TPU infeed layout. FailureOr<Attribute> GetTPUInfeedLayout(ArrayRef<Type> types, OpBuilder& rewriter); } // namespace mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Feb 14 22:51:30 UTC 2023 - 1.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/tpu_annotate_dynamic_shape_inputs.cc
#include "tensorflow/compiler/mlir/tensorflow/ir/tf_ops.h" #include "tensorflow/compiler/mlir/tensorflow/utils/attribute_utils.h" #include "xla/mlir_hlo/mhlo/IR/hlo_ops.h" #define DEBUG_TYPE "tf-tpu-annotate-dynamic-shape-inputs" namespace mlir { namespace TFTPU { namespace { #define GEN_PASS_DEF_TPUANNOTATEDYNAMICSHAPEINPUTSPASS #include "tensorflow/compiler/mlir/tensorflow/transforms/tf_passes.h.inc"
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 6.2K bytes - Viewed (0)