if r2 != 0 {
		// TODO: Consistency in the encoding would be nice here.
		if p.arch.InFamily(sys.ARM, sys.ARM64) {
			// Special form
			// ARM: destination register pair (R1, R2).
			// ARM64: register pair (R1, R2) for LDP/STP.
			if prefix != 0 || scale != 0 {
				p.errorf("illegal address mode for register pair")
				return
			}
			a.Type = obj.TYPE_REGREG
			a.Offset = int64(r2)
			// Nothing may follow
			return

19DE..19DF    ; valid                  ;      ; NV8    # 4.1  NEW TAI LUE SIGN LAE..NEW TAI LUE SIGN LAEV
19E0..19FF    ; valid                  ;      ; NV8    # 4.0  KHMER SYMBOL PATHAMASAT..KHMER SYMBOL DAP-PRAM ROC
1A00..1A1B    ; valid                                  # 4.1  BUGINESE LETTER KA..BUGINESE VOWEL SIGN AE
1A1C..1A1D    ; disallowed                             # NA   <reserved-1A1C>..<reserved-1A1D>