XOR $1234567, R5, R3            // 6ca300126863d687
	XORIS $15, R3, R4               // 6c64000f
	XOR   $983040, R3, R4           // 6c64000f

	// TODO: cleanup inconsistency of printing CMPx opcodes with explicit CR arguments.
	CMP R3, R4                      // 7c232000
	CMP R3, R0                      // 7c230000
	CMP R3, R0, CR1                 // CMP R3,CR1,R0   // 7ca30000

<code>softfloat</code>) is made available to assembly code by predefining either
<code>GOMIPS64_hardfloat</code> or <code>GOMIPS64_softfloat</code>.
</p>

<h3 id="unsupported_opcodes">Unsupported opcodes</h3>

<p>
The assemblers are designed to support the compiler so not all hardware instructions
are defined for all architectures: if the compiler doesn't generate it, it might not be there.

code is governed by a BSD-style // license that can be found in the LICENSE file. //go:build !purego #include "textflag.h" // This is a port of the s390x asm implementation. // to ppc64le. // Some changes were needed due to differences in // the Go opcodes and/or available instructions // between s390x and ppc64le. // 1. There were operand order differences in the // VSUBUQM, VSUBCUQ, and VSEL instructions. // 2. ppc64 does not have a multiply high and low // like s390x, so those were implemented using...