ss_size   uintptr
}

type sigcontext struct {
	_unused     [4]uint64
	signal      int32
	_pad0       int32
	handler     uint64
	oldmask     uint64
	regs        *ptregs
	gp_regs     [48]uint64
	fp_regs     [33]float64
	v_regs      *vreg
	vmx_reserve [101]int64
}

type ucontext struct {
	uc_flags    uint64
	uc_link     *ucontext
	uc_stack    stackt
	uc_sigmask  uint64

	ITIMER_REAL    = C.ITIMER_REAL
	ITIMER_VIRTUAL = C.ITIMER_VIRTUAL
	ITIMER_PROF    = C.ITIMER_PROF

	O_RDONLY  = C.O_RDONLY
	O_CLOEXEC = C.O_CLOEXEC
)

type Fpreg C.struct__fpreg
type Fpxreg C.struct__fpxreg
type Xmmreg C.struct__xmmreg
type Fpstate C.struct__fpstate
type Timespec C.struct_timespec
type Timeval C.struct_timeval
type Sigaction C.struct_kernel_sigaction

	opLe         = 0x2C
	opLt         = 0x2D
	opNe         = 0x2E
	opLit0       = 0x30
	/* OpLitN = OpLit0 + N for N = 0..31 */
	opReg0 = 0x50
	/* OpRegN = OpReg0 + N for N = 0..31 */
	opBreg0 = 0x70 /* 1 op, signed LEB128 constant */
	/* OpBregN = OpBreg0 + N for N = 0..31 */
	opRegx       = 0x90 /* 1 op, ULEB128 register */
	opFbreg      = 0x91 /* 1 op, SLEB128 offset */
	opBregx      = 0x92 /* 2 op, ULEB128 reg; SLEB128 off */

		c.floatParamRegs = paramFloatRegLOONG64
		c.FPReg = framepointerRegLOONG64
		c.LinkReg = linkRegLOONG64
		c.hasGReg = true
	case "s390x":
		c.PtrSize = 8
		c.RegSize = 8
		c.lowerBlock = rewriteBlockS390X
		c.lowerValue = rewriteValueS390X
		c.registers = registersS390X[:]
		c.gpRegMask = gpRegMaskS390X
		c.fpRegMask = fpRegMaskS390X
		c.FPReg = framepointerRegS390X
		c.LinkReg = linkRegS390X

		if e.ID != vid {
			continue
		}
		if e.regs[0] == r {
			// Already known and highest priority
			return
		}
		for j := 1; j < len(e.regs); j++ {
			if e.regs[j] == r {
				// Move from lower priority to top priority
				copy(e.regs[1:], e.regs[:j])
				e.regs[0] = r
				return
			}
		}
		copy(e.regs[1:], e.regs[:])
		e.regs[0] = r
		return
	}

	stackBytes   uintptr // stack space used
	iregs, fregs int     // registers used
}

func (a *abiSeq) dump() {
	for i, p := range a.steps {
		println("part", i, p.kind, p.offset, p.size, p.stkOff, p.ireg, p.freg)
	}
	print("values ")
	for _, i := range a.valueStart {
		print(i, " ")
	}
	println()
	println("stack", a.stackBytes)
	println("iregs", a.iregs)
	println("fregs", a.fregs)
}

 */

package org.gradle.api.internal.classloading;

import org.gradle.api.GradleException;

import java.lang.reflect.Field;
import java.util.prefs.AbstractPreferences;
import java.util.prefs.PreferenceChangeListener;
import java.util.prefs.Preferences;

public class PreferenceCleaningGroovySystemLoader implements GroovySystemLoader {

    private final Field prefListenerField;

*/
import "C"

const (
	O_RDONLY    = C.O_RDONLY
	O_CLOEXEC   = C.O_CLOEXEC
	SA_RESTORER = 0 // unused
)

type Usigset C.__sigset_t

// types used in sigcontext
type Ptregs C.struct_pt_regs
type Gregset C.elf_gregset_t
type FPregset C.elf_fpregset_t
type Vreg C.elf_vrreg_t

type StackT C.stack_t

// PPC64 uses sigcontext in place of mcontext in ucontext.

		if b.Func != f {
			f.Fatalf("%s.Func=%s, want %s", b, b.Func.Name, f.Name)
		}

		for i, e := range b.Preds {
			if se := e.b.Succs[e.i]; se.b != b || se.i != i {
				f.Fatalf("block pred/succ not crosslinked correctly %d:%s %d:%s", i, b, se.i, se.b)
			}
		}
		for i, e := range b.Succs {
			if pe := e.b.Preds[e.i]; pe.b != b || pe.i != i {
				f.Fatalf("block succ/pred not crosslinked correctly %d:%s %d:%s", i, b, pe.i, pe.b)
			}

type Matcher interface {
	Match(...Tag) (Tag, int, int)
}

type matcher struct {
	tags []Tag
}

func (m *matcher) Match(prefs ...Tag) (Tag, int, int) {
	for _, pref := range prefs {
		for _, tag := range m.tags {
			if tag == pref || strings.HasPrefix(string(pref), string(tag+"-")) || strings.HasPrefix(string(tag), string(pref+"-")) {
				return tag, 0, 0
			}
		}
	}