}

	/* create string with integer variable */
	v := 'x'
	c = string(v)
	if c != "x" {
		panic("create int " + c)
	}

	/* create string with byte array */
	var z1 [3]byte
	z1[0] = 'a'
	z1[1] = 'b'
	z1[2] = 'c'
	c = string(z1[0:])
	if c != "abc" {
		panic("create byte array " + c)
	}

	/* create string with int array */
	var z2 [3]rune
	z2[0] = 'a'
	z2[1] = '\u1234'
	z2[2] = 'c'

// * sn = scale for tensor n
// * zn = zero point for tensor n
//
// r3 = r1 * r2
//    = s1 (q1 - z1) * s2 (q2 - z2)
//    = s1 s2 (q1 q2 - q1 z2 - q2 z1 + z1 z2)
//
// * z2 is zero, because it assumes symmetric quantization for the filter:
//
//    = s1 s2 (q1 q2 - q2 z1)
//
// In StableHLO text representation, the pattern is as the following
// (simplified):
//
// ```

	UMWAIT (BX)                      // ERROR "invalid instruction"
	// .Z instructions
	VMOVDQA32.Z Z0, Z1               // ERROR "mask register must be specified for .Z instructions"
	VMOVDQA32.Z Z0, K0, Z1           // ERROR "invalid instruction"
	VMOVDQA32.Z Z0, K1, Z1           // ok

	RDPID (BX)			 // ERROR "invalid instruction"

         synonymFile.insert(synonymItem1);
         final PagingList<SynonymItem> itemList2 = synonymFile.selectList(0, 20);
         assertEquals(6, itemList2.size());
         assertEquals("z1", itemList2.get(5).getInputs()[0]);
         assertEquals("z2", itemList2.get(5).getInputs()[1]);
         assertEquals("Z1", itemList2.get(5).getOutputs()[0]);

	// otherwise it converges to the correct z and stays there.
	var z1, z2 nat
	z1 = z
	z1 = z1.setUint64(1)
	z1 = z1.shl(z1, uint(x.bitLen()+1)/2) // must be ≥ √x
	for n := 0; ; n++ {
		z2, _ = z2.div(nil, x, z1)
		z2 = z2.add(z2, z1)
		z2 = z2.shr(z2, 1)
		if z2.cmp(z1) >= 0 {
			// z1 is answer.
			// Figure out whether z1 or z2 is currently aliased to z by looking at loop count.
			if n&1 == 0 {

 * Y3 = Y3-T2 << store-out Y3 result reg

	// X=Z1; Y=Z1; MUL; T-   // T1 = Z1*Z1
	// X-  ; Y=T ; MUL; R=T  // R  = Z1*T1
	// X=X2; Y-  ; MUL; H=T  // H  = X2*T1
	// X=Z2; Y=Z2; MUL; T-   // T2 = Z2*Z2
	// X-  ; Y=T ; MUL; S1=T // S1 = Z2*T2
	// X=X1; Y-  ; MUL; U1=T // U1 = X1*T2
	// SUB(H<H-T)            // H  = H-U1
	// X=Z1; Y=Z2; MUL; T-   // Z3 = Z1*Z2

	V4FMADDSS (DI), [X20-X23], K5, X3                  // 62f25f059b1f or 62f25f259b1f or 62f25f459b1f
	V4FNMADDPS 99(R15)(R15*1), [Z1-Z4], K3, Z15        // 6212774baabc3f63000000
	V4FNMADDPS (DX), [Z1-Z4], K3, Z15                  // 6272774baa3a
	V4FNMADDPS 99(R15)(R15*1), [Z11-Z14], K3, Z15      // 6212274baabc3f63000000
	V4FNMADDPS (DX), [Z11-Z14], K3, Z15                // 6272274baa3a

to the float64 argument f. More flexibility is provided with explicit
setters, for instance:

	var z1 Int
	z1.SetUint64(123)                 // z1 := 123
	z2 := new(Rat).SetFloat64(1.25)   // z2 := 5/4
	z3 := new(Float).SetInt(z1)       // z3 := 123.0

Setters, numeric operations and predicates are represented as methods of
the form:

	func (z *T) SetV(v V) *T          // z = v

	// Use the exponent to extract the 3 appropriate uint64 digits from mPi4,
	// B ~ (z0, z1, z2), such that the product leading digit has the exponent -61.
	// Note, exp >= -53 since x >= PI4 and exp < 971 for maximum float64.
	digit, bitshift := uint(exp+61)/64, uint(exp+61)%64
	z0 := (mPi4[digit] << bitshift) | (mPi4[digit+1] >> (64 - bitshift))
	z1 := (mPi4[digit+1] << bitshift) | (mPi4[digit+2] >> (64 - bitshift))

		if z.Cmp(z1) != 0 {
			t.Errorf("bitset: inconsistent value after SetBit 1, got %s want %s", z, z1)
		}
		z.SetBit(z, i, 0)
		altSetBit(z1, z1, i, 0)
		if z.Bit(i) != 0 {
			t.Errorf("bitset: bit %d of %s got 1 want 0", i, x)
		}
		if z.Cmp(z1) != 0 {
			t.Errorf("bitset: inconsistent value after SetBit 0, got %s want %s", z, z1)
		}
		altSetBit(z1, z1, i, old)
		z.SetBit(z, i, old)
		if z.Cmp(z1) != 0 {