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Results 11 - 14 of 14 for R6 (0.02 sec)

  1. src/cmd/asm/internal/asm/testdata/ppc64_p10.s

    	PLXSD 1234(R1), $0, V1                  // 04000000a82104d2
    	PLXSSP 5(R1), $0, V2                    // 04000000ac410005
    	PLXSSP 5(R0), $1, V2                    // 04100000ac400005
    	PLXV 12346891(R6), $1, VS44             // 041000bccd86660b
    	PLXVP 12345678(R4), $1, VS4             // 041000bce884614e
    	PMXVBF16GER2 VS1, VS2, $1, $2, $3, A1   // 0790c012ec811198
    	PMXVBF16GER2NN VS1, VS2, $1, $2, $3, A1 // 0790c012ec811790
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Thu Mar 23 20:52:57 UTC 2023
    - 14.3K bytes
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  2. src/cmd/asm/internal/asm/testdata/armerror.s

    	MOVW.S	R3, CPSR           // ERROR "invalid .S suffix"
    	MOVW.S	$0, CPSR           // ERROR "invalid .S suffix"
    	MOVM.S	(R0), [R2-R4]      // ERROR "invalid .S suffix"
    	MOVM.S	[R1-R6], (R9)      // ERROR "invalid .S suffix"
    	SWPW.S	R1, (R2), R3       // ERROR "invalid .S suffix"
    	MOVF.S	(R0), F1           // ERROR "invalid .S suffix"
    	MOVF.S	F9, (R4)           // ERROR "invalid .S suffix"
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Oct 23 15:18:14 UTC 2024
    - 14.5K bytes
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  3. doc/asm.html

    to a <code>NOP</code> instruction).
    </p>
    
    <p>
    Addressing modes:
    </p>
    
    <ul>
    
    <li>
    <code>(R5)(R6*1)</code>: The location at <code>R5</code> plus <code>R6</code>.
    It is a scaled mode as on the x86, but the only scale allowed is <code>1</code>.
    </li>
    
    </ul>
    
    <h3 id="mips">MIPS, MIPS64</h3>
    
    <p>
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Nov 28 19:15:27 UTC 2023
    - 36.3K bytes
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  4. cmd/testdata/undeleteable-object.tgz

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    Registered: Sun Nov 03 19:28:11 UTC 2024
    - Last Modified: Fri Apr 26 00:31:12 UTC 2024
    - 8.7M bytes
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