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  2. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/amd64enc_extra.s 

    	VPGATHERQQ X0, 16(SP)(X1*1), X2         // c4e2f991540c10
	VPGATHERQQ X0, 512(SP)(X1*1), X2        // c4e2f991940c00020000
	VPGATHERQQ X0, (R12)(X1*1), X2          // c4c2f991140c
	VPGATHERQQ X0, 16(R12)(X1*1), X2        // c4c2f991540c10
	VPGATHERQQ X0, 512(R12)(X1*1), X2       // c4c2f991940c00020000
	VPGATHERQQ X0, (BP)(X1*1), X2           // c4e2f991540d00
	VPGATHERQQ X0, 16(BP)(X1*1), X2         // c4e2f991540d10
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Thu Feb 20 11:20:03 GMT 2025
    - 57.7K bytes
    - Click Count (0)
  3. github.com/golang/go

    doc/asm.html 

    <code>&gt;&gt;</code> (logical right shift), and
<code>@&gt;</code> (rotate right).

</li>

<li>
<code>[R0,g,R12-R15]</code>: For multi-register instructions, the set comprising
<code>R0</code>, <code>g</code>, and <code>R12</code> through <code>R15</code> inclusive.
</li>

<li>
<code>(R5, R6)</code>: Destination register pair.
</li>

</ul>
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Fri Nov 14 19:09:46 GMT 2025
    - 36.5K bytes
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