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Results 11 - 20 of 23 for PADV2 (0.14 sec)

  1. tensorflow/compiler/mlir/lite/schema/schema_v3b.fbs

      DELEGATE = 51,
      BIDIRECTIONAL_SEQUENCE_LSTM = 52,
      CAST = 53,
      PRELU = 54,
      MAXIMUM = 55,
      ARG_MAX = 56,
      MINIMUM = 57,
      LESS = 58,
      NEG = 59,
      PADV2 = 60,
      GREATER = 61,
      GREATER_EQUAL = 62,
      LESS_EQUAL = 63,
      SELECT = 64,
      SLICE = 65,
      SIN = 66,
      TRANSPOSE_CONV = 67,
      SPARSE_TO_DENSE = 68,
      TILE = 69,
      EXPAND_DIMS = 70,
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue May 28 14:28:27 UTC 2024
    - 30K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/lite/schema/schema.fbs

      DELEGATE = 51,
      BIDIRECTIONAL_SEQUENCE_LSTM = 52,
      CAST = 53,
      PRELU = 54,
      MAXIMUM = 55,
      ARG_MAX = 56,
      MINIMUM = 57,
      LESS = 58,
      NEG = 59,
      PADV2 = 60,
      GREATER = 61,
      GREATER_EQUAL = 62,
      LESS_EQUAL = 63,
      SELECT = 64,
      SLICE = 65,
      SIN = 66,
      TRANSPOSE_CONV = 67,
      SPARSE_TO_DENSE = 68,
      TILE = 69,
      EXPAND_DIMS = 70,
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri May 03 18:01:23 UTC 2024
    - 41.7K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/lite/tests/const-fold.mlir

      %0 = "tfl.pseudo_const"() {value = dense<0> : tensor<1x2xi32>} : () -> tensor<1x2xi32>
      %1 = "tfl.pseudo_const"() {value = dense<0.0> : tensor<f32>} : () -> tensor<f32>
      %2 = "tfl.padv2"(%arg0, %0, %1) : (tensor<15600xf32>, tensor<1x2xi32>, tensor<f32>) -> tensor<15600xf32>
      func.return %2 : tensor<15600xf32>
      // CHECK:  return %arg0
    }
    
    // CHECK-LABEL: @ConstFoldEmbeddingLookup
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 45.8K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo.cc

        ReplaceReturnOp(new_op.getElseBranch(), rewriter);
        rewriter.replaceOp(op, new_op.getResults());
        return success();
      }
    };
    
    // Converts mhlo.pad to tf.PadV2
    Value ConvertPadOp(PatternRewriter& rewriter, Operation* old_op) {
      auto pad_op = cast<mhlo::PadOp>(old_op);
      mlir::Location loc = pad_op.getLoc();
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 154.9K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/tf2xla/tests/legalize-tf.mlir

      // CHECK-SAME: edge_padding_high = dense<2> : tensor<1xi64>,
      // CHECK-SAME: edge_padding_low = dense<1> : tensor<1xi64>,
      // CHECK-SAME: interior_padding = dense<0> : tensor<1xi64>
      %1 = "tf.PadV2"(%arg0, %padding, %arg1) : (tensor<3xf32>, tensor<1x2xi64>, tensor<f32>) -> tensor<6xf32>
      func.return %1 : tensor<6xf32>
    }
    
    // -----
    
    // CHECK-LABEL: func @padv2_2D
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon May 06 18:46:23 UTC 2024
    - 335.5K bytes
    - Viewed (0)
  6. tensorflow/compiler/jit/mark_for_compilation_pass.cc

    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Feb 21 12:19:41 UTC 2024
    - 85.3K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/lite/stablehlo/transforms/uniform_quantized_stablehlo_to_tfl_pass.cc

            op, output_type, op.getOperands(), axis,
            /*fused_activation_function=*/rewriter.getStringAttr("NONE"));
      }
    };
    
    // Rewrites quantized stablehlo.pad to tfl.padv2.
    // tfl.dilate is introduced in between when interior padding exists.
    // TODO: b/322428814 - Add StableHLO quantizer integration tests for ODML.
    class RewriteQuantizedPadOp : public OpRewritePattern<stablehlo::PadOp> {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Apr 22 09:00:19 UTC 2024
    - 99.8K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/lite/stablehlo/tests/legalize_hlo.mlir

    // CHECK-SAME:                      %[[VAL_1:.*]]: tensor<f32>) -> tensor<11x131xf32> {
    // CHECK:           %[[VAL_2:.*]] = arith.constant dense<{{\[\[}}1, 2], [0, 3]]> : tensor<2x2xi64>
    // CHECK:           %[[VAL_3:.*]] = "tf.PadV2"(%[[VAL_0]], %[[VAL_2]], %[[VAL_1]]) : (tensor<8x128xf32>, tensor<2x2xi64>, tensor<f32>) -> tensor<11x131xf32>
    // CHECK:           return %[[VAL_3]] : tensor<11x131xf32>
    // CHECK:         }
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 29 07:26:59 UTC 2024
    - 340.2K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/lite/ir/tfl_ops.td

      let results = (outs TFL_TensorOf<[F32, I32, I64, QI8, QUI8, TFL_Quint8, QI16]>:$output);
    
      let hasOptions = 1;
    
      let hasFolder = 1;
    }
    
    def TFL_PadV2Op : TFL_Op<"padv2", [
        PredOpTrait<"input and output must have same element type",
          TFL_TCresVTEtIsSameAsOp<0, 0>>,
        Pure,
        QuantizableResult,
        SameOperandsAndResultsScale,
        TFL_OperandHasRankAtMost<0, 5>,
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jun 06 19:09:08 UTC 2024
    - 186K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/tensorflow/tests/tf-ops.mlir

      %paddings = "tf.Const"() {value = dense<[0, 1]> : tensor<2xi64>} : () -> tensor<2xi64>
      // expected-error @+1 {{failed to verify that operand 1 is 2-D}}
      %0 = "tf.PadV2"(%input, %paddings, %constant) : (tensor<2xi64>, tensor<2xi64>, tensor<i64>) -> tensor<3xi64>
      func.return %0 : tensor<3xi64>
    }
    
    // -----
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 23 14:40:35 UTC 2023
    - 236.4K bytes
    - Viewed (0)
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