if a.Segment != 0 || a.Disp == 0 || a.Index != 0 || a.Scale != 0 {
		return "", 0
	}

	var disp uint64
	switch a.Base {
	case IP, EIP, RIP:
		disp = uint64(a.Disp + int64(pc) + int64(instrLen))
	case 0:
		disp = uint64(a.Disp)
	default:
		return "", 0
	}

	s, base := symname(disp)
	return s, int64(disp) - int64(base)
}

	if e != 0 {
		err = e
	}
	return
}

func (r *PtraceRegs) PC() uint64 { return uint64(uint32(r.Eip)) }

func (r *PtraceRegs) SetPC(pc uint64) { r.Eip = int32(pc) }

func (iov *Iovec) SetLen(length int) {
	iov.Len = uint32(length)
}

func (msghdr *Msghdr) SetControllen(length int) {
	msghdr.Controllen = uint32(length)
}

	esi           uint32
	ebp           uint32
	esp           uint32
	ebx           uint32
	edx           uint32
	ecx           uint32
	eax           uint32
	trapno        uint32
	err           uint32
	eip           uint32
	cs            uint16
	__csh         uint16
	eflags        uint32
	esp_at_signal uint32
	ss            uint16
	__ssh         uint16
	fpstate       *fpstate
	oldmask       uint32

	if e != 0 {
		err = e
	}
	return
}

func (r *PtraceRegs) PC() uint64 { return uint64(uint32(r.Eip)) }

func (r *PtraceRegs) SetPC(pc uint64) { r.Eip = int32(pc) }

func (iov *Iovec) SetLen(length int) {
	iov.Len = uint32(length)
}

func (msghdr *Msghdr) SetControllen(length int) {
	msghdr.Controllen = uint32(length)
}

}

type regs32 struct {
	eax    uint32
	ebx    uint32
	ecx    uint32
	edx    uint32
	edi    uint32
	esi    uint32
	ebp    uint32
	esp    uint32
	ss     uint32
	eflags uint32
	eip    uint32
	cs     uint32
	ds     uint32
	es     uint32
	fs     uint32
	gs     uint32
}

type floatstate32 struct {
	fpu_reserved  [2]int32
	fpu_fcw       fpcontrol
	fpu_fsw       fpstatus

	Es     uint32
	Ds     uint32
	Edi    uint32
	Esi    uint32
	Ebp    uint32
	Isp    uint32
	Ebx    uint32
	Edx    uint32
	Ecx    uint32
	Eax    uint32
	Trapno uint32
	Err    uint32
	Eip    uint32
	Cs     uint32
	Eflags uint32
	Esp    uint32
	Ss     uint32
	Gs     uint32
}

type FpReg struct {
	Env   [7]uint32
	Acc   [8][10]uint8
	Ex_sw uint32
	Pad   [64]uint8
}

		if inst.Mode == 32 {
			return fmt.Sprintf("%#x", uint32(a))
		}
		if Imm(int32(a)) == a {
			return fmt.Sprintf("%#x", int64(a))
		}
		return fmt.Sprintf("%#x", uint64(a))
	case Mem:
		if a.Base == EIP {
			a.Base = RIP
		}
		prefix := ""
		switch inst.MemBytes {
		case 1:
			prefix = "byte "
		case 2:
			prefix = "word "
		case 4:
			prefix = "dword "
		case 8:
			prefix = "qword "

000000c0  3d b2 da 2d 80 26 c9 24  cd 14 0b 48 2e d7 c4 dc  |=..-.&.$...H....|
000000d0  4c 61 1e 5d 46 ce 66 cd  94 50 a4 e8 c4 d7 f0 48  |La.]F.f..P.....H|
000000e0  20 16 52 fb 12 04 17 48  7d 65 49 50 c5 b8 e6 9c  | .R....H}eIP....|
000000f0  be f6 58 09 ea 8b 94 51  93 cf 0d 7a 76 88 78 cb  |..X....Q...zv.x.|
00000100  37 83 43 fa 37 d5 5b 3f  10 1d 07 b1 bb 9b ac 3a  |7.C.7.[?.......:|

	RBP:  "%rbp",
	RSI:  "%rsi",
	RDI:  "%rdi",
	R8:   "%r8",
	R9:   "%r9",
	R10:  "%r10",
	R11:  "%r11",
	R12:  "%r12",
	R13:  "%r13",
	R14:  "%r14",
	R15:  "%r15",
	IP:   "%ip",
	EIP:  "%eip",
	RIP:  "%rip",
	F0:   "%st",
	F1:   "%st(1)",
	F2:   "%st(2)",
	F3:   "%st(3)",
	F4:   "%st(4)",
	F5:   "%st(5)",
	F6:   "%st(6)",
	F7:   "%st(7)",
	M0:   "%mm0",
	M1:   "%mm1",

	Ecx      int32
	Edx      int32
	Esi      int32
	Edi      int32
	Ebp      int32
	Eax      int32
	Xds      int32
	Xes      int32
	Xfs      int32
	Xgs      int32
	Orig_eax int32
	Eip      int32
	Xcs      int32
	Eflags   int32
	Esp      int32
	Xss      int32
}

type FdSet struct {
	Bits [32]int32
}

type Sysinfo_t struct {
	Uptime    int32
	Loads     [3]uint32