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Results 11 - 20 of 20 for DUPOK (0.06 sec)

  1. src/cmd/asm/internal/asm/testdata/mips64.s

    // license that can be found in the LICENSE file.
    
    // This input was created by taking the ppc64 testcase and modified
    // by hand.
    
    #include "../../../../../runtime/textflag.h"
    
    TEXT foo(SB),DUPOK|NOSPLIT,$0
    //
    // branch
    //
    //	LBRA rel
    //	{
    //		outcode(int($1), &nullgen, 0, &$2);
    //	}
    	BEQ	R1, 2(PC)
    label0:
    	JMP	1(PC)		// JMP 1(PC)	// 10000001
    	BEQ	R1, 2(PC)
    	JMP	label0+0	// JMP 3	// 1000fffd
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 12.4K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/loong64enc1.s

    // Copyright 2022 The Go Authors. All rights reserved.
    // Use of this source code is governed by a BSD-style
    // license that can be found in the LICENSE file.
    
    #include "../../../../../runtime/textflag.h"
    
    TEXT asmtest(SB),DUPOK|NOSPLIT,$0
    lable1:
    	BFPT	1(PC)			// 00050048
    	BFPT	lable1	// BFPT 2	//1ffdff4b
    
    lable2:
    	BFPF	1(PC)			// 00040048
    	BFPF	lable2	// BFPF 4 	// 1ffcff4b
    
    	// relocation in play so the assembled offset should be 0
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Sat Nov 02 01:36:19 UTC 2024
    - 11.6K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/riscv64.s

    // Copyright 2019 The Go Authors. All rights reserved.
    // Use of this source code is governed by a BSD-style
    // license that can be found in the LICENSE file.
    
    #include "../../../../../runtime/textflag.h"
    
    TEXT asmtest(SB),DUPOK|NOSPLIT,$0
    start:
    	//
    	// Unprivileged ISA
    	//
    
    	// 2.4: Integer Computational Instructions
    
    	ADDI	$2047, X5				// 9382f27f
    	ADDI	$-2048, X5				// 93820280
    	ADDI	$2048, X5				// 9382024093820240
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Oct 25 12:05:29 UTC 2024
    - 16.8K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/ppc64.s

    // In case of index mode instructions, usage of
    // (Rx)(R0) is equivalent to (Rx+R0)
    // In case of base+displacement mode instructions if
    // the offset is 0, usage of (Rx) is equivalent to 0(Rx)
    TEXT asmtest(SB),DUPOK|NOSPLIT,$0
    	// move constants
    	MOVD $1, R3                     // 38600001
    	MOVD $-1, R4                    // 3880ffff
    	MOVD $65535, R5                 // 6005ffff
    	MOVD $65536, R6                 // 3cc00001
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Oct 29 13:14:38 UTC 2024
    - 51K bytes
    - Viewed (0)
  5. src/cmd/asm/internal/asm/testdata/arm64enc.s

    // and they are consistent with disassembler decoding.
    // TODO means they cannot be handled by current assembler.
    
    #include "../../../../../runtime/textflag.h"
    
    TEXT asmtest(SB),DUPOK|NOSPLIT,$-8
    
    	AND $(1<<63), R1                           // AND $-9223372036854775808, R1     // 21004192
    	ADCW ZR, R8, R10                           // 0a011f1a
    	ADC R0, R2, R12                            // 4c00009a
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Mon Jul 24 01:11:41 UTC 2023
    - 43.9K bytes
    - Viewed (0)
  6. src/cmd/asm/internal/asm/testdata/arm.s

    // the old assembler's (5a's) grammar and hand-writing complete
    // instructions for each rule, to guarantee we cover the same space.
    
    #include "../../../../../runtime/textflag.h"
    
    TEXT	foo(SB), DUPOK|NOSPLIT, $0
    
    // ADD
    //
    //	LTYPE1 cond imsr ',' spreg ',' reg
    //	{
    //		outcode($1, $2, &$3, $5, &$7);
    //	}
    // Cover some operand space here too.
    	ADD	$1, R2, R3
    	ADD	R1<<R2, R3, R4
    	ADD	R1>>R2, R3, R4
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Dec 15 20:51:01 UTC 2023
    - 69K bytes
    - Viewed (0)
  7. doc/asm.html

    </p>
    
    <ul>
    <li>
    <code>NOPROF</code> = 1
    <br>
    (For <code>TEXT</code> items.)
    Don't profile the marked function.  This flag is deprecated.
    </li>
    <li>
    <code>DUPOK</code> = 2
    <br>
    It is legal to have multiple instances of this symbol in a single binary.
    The linker will choose one of the duplicates to use.
    </li>
    <li>
    <code>NOSPLIT</code> = 4
    <br>
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Nov 28 19:15:27 UTC 2023
    - 36.3K bytes
    - Viewed (0)
  8. src/cmd/asm/internal/asm/testdata/amd64enc_extra.s

    // license that can be found in the LICENSE file.
    
    // This input extends auto-generated amd64enc.s test suite
    // with manually added tests.
    
    #include "../../../../../runtime/textflag.h"
    
    TEXT asmtest(SB),DUPOK|NOSPLIT,$0
    	// AVX2GATHER: basic combinations.
    	VPGATHERDQ Y2, (BP)(X7*2), Y1           // c4e2ed904c7d00
    	VPGATHERDQ X12, (R13)(X14*2), X11       // c40299905c7500
    	VPGATHERDQ Y12, (R13)(X14*2), Y11       // c4029d905c7500
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Apr 11 18:32:50 UTC 2023
    - 57.6K bytes
    - Viewed (0)
  9. src/cmd/asm/internal/asm/testdata/arm64.s

    // the old assembler's (7a's) grammar and hand-writing complete
    // instructions for each rule, to guarantee we cover the same space.
    
    #include "../../../../../runtime/textflag.h"
    
    TEXT	foo(SB), DUPOK|NOSPLIT, $-8
    
    // arithmetic operations
    	ADDW	$1, R2, R3
    	ADDW	R1, R2, R3
    	ADDW	R1, ZR, R3
    	ADD	$1, R2, R3
    	ADD	R1, R2, R3
    	ADD	R1, ZR, R3
    	ADD	$1, R2, R3
    	ADDW	$1, R2
    	ADDW	R1, R2
    	ADD	$1, R2
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Jul 24 18:45:14 UTC 2024
    - 95.2K bytes
    - Viewed (0)
  10. src/cmd/asm/internal/asm/testdata/amd64enc.s

    // generated by x86test -amd64
    // DO NOT EDIT
    
    #include "../../../../../runtime/textflag.h"
    
    TEXT asmtest(SB),DUPOK|NOSPLIT,$0
    	ADCB $7, AL                             // 1407
    	ADCW $61731, AX                         // 661523f1
    	ADCL $4045620583, AX                    // 15674523f1
    	ADCQ $-249346713, AX                    // 4815674523f1
    	ADCW $61731, (BX)                       // 66811323f1
    	ADCW $61731, (R11)                      // 6641811323f1
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Oct 08 21:38:44 UTC 2021
    - 581.9K bytes
    - Viewed (1)
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