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Results 11 - 20 of 28 for ANDconst (0.17 sec)
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src/cmd/compile/internal/ssa/rewritePPC64latelower.go
} break } return false } func rewriteValuePPC64latelower_OpPPC64AND(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] // match: (AND <t> x:(MOVDconst [m]) n) // cond: t.Size() <= 2 // result: (ANDconst [int64(int16(m))] n) for { t := v.Type for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { x := v_0 if x.Op != OpPPC64MOVDconst { continue } m := auxIntToInt64(x.AuxInt) n := v_1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 16.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM64.go
return true } // match: (ANDconst [c] (MOVDconst [d])) // result: (MOVDconst [c&d]) for { c := auxIntToInt64(v.AuxInt) if v_0.Op != OpARM64MOVDconst { break } d := auxIntToInt64(v_0.AuxInt) v.reset(OpARM64MOVDconst) v.AuxInt = int64ToAuxInt(c & d) return true } // match: (ANDconst [c] (ANDconst [d] x)) // result: (ANDconst [c&d] x) for {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 608.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteMIPS.go
return true } // match: (ANDconst [c] (MOVWconst [d])) // result: (MOVWconst [c&d]) for { c := auxIntToInt32(v.AuxInt) if v_0.Op != OpMIPSMOVWconst { break } d := auxIntToInt32(v_0.AuxInt) v.reset(OpMIPSMOVWconst) v.AuxInt = int32ToAuxInt(c & d) return true } // match: (ANDconst [c] (ANDconst [d] x)) // result: (ANDconst [c&d] x) for {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 14:43:03 UTC 2023 - 176.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM.go
return true } // match: (ANDconst [c] (MOVWconst [d])) // result: (MOVWconst [c&d]) for { c := auxIntToInt32(v.AuxInt) if v_0.Op != OpARMMOVWconst { break } d := auxIntToInt32(v_0.AuxInt) v.reset(OpARMMOVWconst) v.AuxInt = int32ToAuxInt(c & d) return true } // match: (ANDconst [c] (ANDconst [d] x)) // result: (ANDconst [c&d] x) for {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 486.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteMIPS64.go
return true } // match: (ANDconst [c] (MOVVconst [d])) // result: (MOVVconst [c&d]) for { c := auxIntToInt64(v.AuxInt) if v_0.Op != OpMIPS64MOVVconst { break } d := auxIntToInt64(v_0.AuxInt) v.reset(OpMIPS64MOVVconst) v.AuxInt = int64ToAuxInt(c & d) return true } // match: (ANDconst [c] (ANDconst [d] x)) // result: (ANDconst [c&d] x) for {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 31 03:59:48 UTC 2023 - 211.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/S390X.rules
// Remove redundant *const ops (ADDconst [0] x) => x (ADDWconst [c] x) && int32(c)==0 => x (SUBconst [0] x) => x (SUBWconst [c] x) && int32(c) == 0 => x (ANDconst [0] _) => (MOVDconst [0]) (ANDWconst [c] _) && int32(c)==0 => (MOVDconst [0]) (ANDconst [-1] x) => x (ANDWconst [c] x) && int32(c)==-1 => x (ORconst [0] x) => x (ORWconst [c] x) && int32(c)==0 => x
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 12 18:09:26 UTC 2023 - 74.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM64latelower.go
v.AddArg2(x, v0) return true } return false } func rewriteValueARM64latelower_OpARM64ANDconst(v *Value) bool { v_0 := v.Args[0] b := v.Block typ := &b.Func.Config.Types // match: (ANDconst [c] x) // cond: !isARM64bitcon(uint64(c)) // result: (AND x (MOVDconst [c])) for { c := auxIntToInt64(v.AuxInt) x := v_0 if !(!isARM64bitcon(uint64(c))) { break } v.reset(OpARM64AND)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 19.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteLOONG64.go
return true } // match: (ANDconst [c] (MOVVconst [d])) // result: (MOVVconst [c&d]) for { c := auxIntToInt64(v.AuxInt) if v_0.Op != OpLOONG64MOVVconst { break } d := auxIntToInt64(v_0.AuxInt) v.reset(OpLOONG64MOVVconst) v.AuxInt = int64ToAuxInt(c & d) return true } // match: (ANDconst [c] (ANDconst [d] x)) // result: (ANDconst [c&d] x) for {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:26:25 UTC 2023 - 195.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPSOps.go
{name: "DIVD", argLength: 2, reg: fp21, asm: "DIVD"}, // arg0 / arg1 {name: "AND", argLength: 2, reg: gp21, asm: "AND", commutative: true}, // arg0 & arg1 {name: "ANDconst", argLength: 1, reg: gp11, asm: "AND", aux: "Int32"}, // arg0 & auxInt {name: "OR", argLength: 2, reg: gp21, asm: "OR", commutative: true}, // arg0 | arg1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 14:43:03 UTC 2023 - 24K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewrite.go
// and return mask & m. func mergePPC64RShiftMask(m, s, nbits int64) int64 { smask := uint64((1<<uint(nbits))-1) >> uint(s) return m & int64(smask) } // Combine (ANDconst [m] (SRWconst [s])) into (RLWINM [y]) or return 0 func mergePPC64AndSrwi(m, s int64) int64 { mask := mergePPC64RShiftMask(m, s, 32) if !isPPC64WordRotateMask(mask) { return 0 }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 64.2K bytes - Viewed (0)