Search Options

Results per page
Sort
Preferred Languages
Advance

Results 61 - 70 of 71 for 3x4xf32 (0.19 sec)

  1. tensorflow/compiler/mlir/tensorflow/tests/tpu_sharding_identification.mlir

    }
    func.func @_func(%arg0: tensor<2x4xf32>, %arg1: tensor<4x2xf32>) -> tensor<2x2xf32> {
      %0 = "tf.MatMul"(%arg0, %arg1) {_XlaSharding = "\08\03\1A\02\02\01\22\02\00\01"} : (tensor<2x4xf32>, tensor<4x2xf32>) -> tensor<2x2xf32>
      %1 = "tf.Identity"(%0) : (tensor<2x2xf32>) -> tensor<2x2xf32>
      return %1 : tensor<2x2xf32>
    }
    
    // -----
    // The following op sharding is used in the following test case:
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Feb 20 19:07:52 UTC 2024
    - 47.5K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/lite/tests/quantize.mlir

    }
    
    // CHECK-LABEL: QuantizeConcat
    func.func @QuantizeConcat(tensor<1x2xf32>, tensor<1x2xf32>) -> tensor<2x2x!quant.uniform<u8:f32, 1.000000e-01:128>> {
    ^bb0(%arg0: tensor<1x2xf32>, %arg1: tensor<1x2xf32>):
      %0 = "tfl.concatenation"(%arg0, %arg1) {axis = 0 : i32, fused_activation_function = "NONE"} : (tensor<1x2xf32>, tensor<1x2xf32>) -> tensor<2x2xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue May 28 23:10:13 UTC 2024
    - 39.7K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/lite/stablehlo/tests/tfl_legalize_hlo.mlir

    func.func @main(%arg0: tensor<5x7xf32>) -> tensor<5x7xf32> {
      func.return %arg0: tensor<5x7xf32>
    // CHECK-LABEL: main
    // CHECK: return %arg0 : tensor<5x7xf32>
    }
    
    // - transpose
    //
    func.func @transpose_2d(%arg0: tensor<2x3xf32>) -> tensor<3x2xf32> {
      %0 = "mhlo.transpose"(%arg0) <{permutation = dense<[1, 0]> : tensor<2xi64>}> : (tensor<2x3xf32>) -> tensor<3x2xf32>
      func.return %0 : tensor<3x2xf32>
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 40.1K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/lite/tests/prepare-quantize-post-training-16bits.mlir

          time_major = false} : (
            tensor<1x2x3xf32>,
            tensor<1x1xf32>, tensor<1x1xf32>, tensor<1x1xf32>, tensor<1x1xf32>,
            tensor<1x1xf32>, tensor<1x1xf32>, tensor<1x1xf32>, tensor<1x1xf32>,
            none, none, none,
            tensor<3xf32>, tensor<3xf32>, tensor<3xf32>, tensor<3xf32>,
            none, none,
            tensor<1x3xf32>, tensor<1x3xf32>,
            none, none, none, none) -> tensor<1x2x3xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 26.1K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/lite/tests/prepare-quantize-signed.mlir

    }
    
    // CHECK-LABEL: prepareAdd
    func.func @prepareAdd(%arg0: tensor<2x2xf32>) -> tensor<2x2xf32> {
      %cst = arith.constant dense<[[0.0, 1.0], [2.0, 255.0]]> : tensor<2x2xf32>
      %add = "tfl.add"(%arg0, %cst) {fused_activation_function="NONE"} : (tensor<2x2xf32>, tensor<2x2xf32>) -> tensor<2x2xf32>
      func.return %add : tensor<2x2xf32>
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 18.4K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/tf2xla/tests/legalize-tf-quant.mlir

      } : (tensor<4x!tf_type.qint8>, tensor<f32>, tensor<i32>) -> tensor<4xf32>
      func.return %2 : tensor<4xf32>
    }
    
    // -----
    
    // CHECK-LABEL: func @uniform_quantize_requantize_and_dequantize_per_axis
    func.func @uniform_quantize_requantize_and_dequantize_per_axis(%arg0 : tensor<2x2xf32>) -> tensor<2x2xf32> {
      %scales_0 = "tf.Const"() { value = dense<[1.0, 2.0]> : tensor<2xf32> } : () -> tensor<2xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 09 01:25:29 UTC 2024
    - 37.3K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/tfrt/tests/mlrt/tf_to_mlrt.mlir

    // Test for XlaLaunch
    
    func.func private @xla_func_0(%arg0: tensor<1x3xf32>, %arg1: tensor<1x3xf32>) -> tensor<1x3xf32> attributes {tf._XlaMustCompile = true, tf._noinline = true, tf._original_func_name = "should_not_be_used"} {
      %1 = "tf.AddV2"(%arg0, %arg1) {__op_key = 0: i32} : (tensor<1x3xf32>, tensor<1x3xf32>) -> tensor<1x3xf32>
      func.return %1 : tensor<1x3xf32>
    }
    
    // CHECK-LABEL: func @xla_func
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri May 31 20:44:15 UTC 2024
    - 24.7K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/quantization/tensorflow/passes/convert_tf_xla_op_to_tf_op.cc

    //
    // Examples:
    //   * If `xla_gather_op_output_type` == tensor<*xf32>, then it returns:
    //     tensor<*xf32>.
    //   * If `xla_gather_op_output_type` == tensor<3x5xi32> and `collapsed_dims` ==
    //     {0}, then it returns: tensor<1x3x5xi32>.
    //   * If `xla_gather_op_output_type` == tensor<3x5xf32> and `collapsed_dims` ==
    //     {1, 3}, then it returns: tensor<3x1x5x1xf32>.
    Type GetSliceOpOutputType(Type xla_gather_op_output_type,
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 13.2K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/tensorflow/tests/mark_ops_for_outside_compilation.mlir

        %2:2 = "tf.RecvTPUEmbeddingActivations"() {_tpu_embedding_layer = "call1", config = "\0A\0B\0C\0D"} : () -> (tensor<2x2xf32>, tensor<4x4xf32>)
        "tf.SendTPUEmbeddingGradients"(%2#0, %2#1) {_tpu_embedding_layer = "call1", config = "\0A\0B\0C\0D", operandSegmentSizes = array<i32: 2, 0>} : (tensor<2x2xf32>, tensor<4x4xf32>) -> ()
        tf_device.return
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Apr 24 16:22:32 UTC 2024
    - 29.5K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/lite/stablehlo/tests/composite-lowering.mlir

      %2 = mhlo.constant dense<6.400000e+01> : tensor<64xf32>
      %3 = mhlo.constant dense<3.200000e+01> : tensor<64xf32>
      %4 = mhlo.constant dense<5.000000e-01> : tensor<64xf32>
      %5 = "mhlo.iota"() <{iota_dimension = 0 : i64}> : () -> tensor<64xf32>
      %6 = mhlo.add %5, %4 : tensor<64xf32>
      %7 = mhlo.multiply %6, %3 : tensor<64xf32>
      %8 = mhlo.divide %7, %2 : tensor<64xf32>
      %9 = mhlo.floor %8 : tensor<64xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jun 06 18:45:51 UTC 2024
    - 32.6K bytes
    - Viewed (0)
Back to top