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Results 51 - 60 of 61 for 16xf32 (0.14 sec)
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tensorflow/compiler/mlir/tf2xla/tests/legalize-tf-prefer-tf2xla.mlir
// NOFALLBACK: XlaSvd %s, %u, %v = "tf.XlaSvd"(%arg0) {max_iter = 1, epsilon = 1.0E-09 : f32, precision_config = ""} : (tensor<1x1xf32>) -> (tensor<1xf32>, tensor<1x1xf32>, tensor<1x1xf32>) func.return %s, %u, %v : tensor<1xf32>, tensor<1x1xf32>, tensor<1x1xf32> } //===----------------------------------------------------------------------===// // Random op legalizations.
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Apr 06 15:32:52 UTC 2024 - 15.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/tests/bridge/optimize.mlir
%2 = chlo.broadcast_add %1, %bias : ( tensor<?x2x2x1xi32>, tensor<1xi32>) ->tensor<?x2x2x1xi32> return %2 : tensor<?x2x2x1xi32> } // ----- // CHECK-LABEL: func @convolution_add_add_static func.func @convolution_add_add_static( %lhs: tensor<2x3x2x1xi8>, %rhs: tensor<2x1x1x1xi8>, %zp_offset: tensor<2x2x2x1xi32>, %bias: tensor<1xi32> ) -> tensor<2x2x2x1xi32> { // CHECK-DAG: %[[conv:.*]] = mhlo.convolution
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Feb 24 02:26:47 UTC 2024 - 10.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/const-fold.mlir
%7 = "tfl.add"(%2, %1) {fused_activation_function = "NONE"} : (tensor<4xf32>, tensor< f32>) -> tensor<4xf32> %8 = "tfl.add"(%2, %3) {fused_activation_function = "NONE"} : (tensor<4xf32>, tensor<4xf32>) -> tensor<4xf32> %9 = "tfl.add"(%2, %3) {fused_activation_function = "SIGN_BIT"} : (tensor<4xf32>, tensor<4xf32>) -> tensor<4xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 45.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfr/ir/tfr_ops.td
tensor type, the shape shouldn't be changed during the conversion. Example: ```mlir %1 = tfr.constant_tensor(%0) : f32 -> tensor<f32> %3 = tfr.constant_tensor(%2) : vector<1xf32> -> tensor<1xf32> ``` }]; let arguments = (ins TFR_AllAttrTypes:$arg); let results = (outs TFR_singleTensorType:$out); let hasCanonicalizer = 1; let hasVerifier = 1; }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Apr 22 10:54:29 UTC 2024 - 17.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/mlrt/while_to_map_fn.mlir
%outputs_50 = "tf.Mul"(%outputs_30, %outputs_48) {device = ""} : (tensor<*xf32>, tensor<*xf32>) -> tensor<*xf32> %outputs_52 = "tf.Reshape"(%outputs_50, %outputs_0) {device = ""} : (tensor<*xf32>, tensor<2xi32>) -> tensor<*xf32> %outputs_54 = "tf.MatMul"(%outputs_40, %outputs_52) {device = "", transpose_a = false, transpose_b = false} : (tensor<*xf32>, tensor<*xf32>) -> tensor<*xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Apr 23 06:40:22 UTC 2024 - 68.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/tests/legalize-tf-with-tf2xla-hlo-importer.mlir
// CHECK-LABEL: @xla_svd func.func @xla_svd(%arg0: tensor<1x1xf32>) -> (tensor<1xf32>, tensor<1x1xf32>, tensor<1x1xf32>) { // CHECK-NOT: XlaSvd %s, %u, %v = "tf.XlaSvd"(%arg0) {max_iter = 1, epsilon = 1.0E-09 : f32, precision_config = ""} : (tensor<1x1xf32>) -> (tensor<1xf32>, tensor<1x1xf32>, tensor<1x1xf32>) func.return %s, %u, %v : tensor<1xf32>, tensor<1x1xf32>, tensor<1x1xf32> } func.func @identity(%arg0: f32) -> f32 {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Apr 06 15:32:52 UTC 2024 - 38.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/post-quantize.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 19.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/decompose_resource_ops.mlir
// CHECK-DAG: %[[SIGN:.*]] = "tf.Sign"(%[[PROX]]) : (tensor<4xf32>) -> tensor<4xf32> // CHECK-DAG: %[[ABS:.*]] = "tf.Abs"(%[[PROX]]) : (tensor<4xf32>) -> tensor<4xf32> // CHECK-DAG: %[[SCALED_L1:.*]] = "tf.Mul"(%[[ADAGRAD_LR]], %[[L1]]) : (tensor<4xf32>, tensor<f32>) -> tensor<4xf32> // CHECK-DAG: %[[PROX_NEW:.*]] = "tf.Sub"(%[[ABS]], %[[SCALED_L1]]) : (tensor<4xf32>, tensor<4xf32>) -> tensor<4xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 22 19:47:48 UTC 2024 - 51.3K bytes - Viewed (0) -
src/hash/crc32/crc32_table_ppc64le.s
DATA ·IEEEConst+1544(SB)/8,$0x0000000090db8c44 /* x^161856 mod p(x), x^161792 mod p(x) */ DATA ·IEEEConst+1552(SB)/8,$0x0000000067a2c786 DATA ·IEEEConst+1560(SB)/8,$0x000000010010a4ce /* x^160832 mod p(x), x^160768 mod p(x) */ DATA ·IEEEConst+1568(SB)/8,$0x0000000048b9496c DATA ·IEEEConst+1576(SB)/8,$0x00000001c8f4c72c /* x^159808 mod p(x), x^159744 mod p(x) */ DATA ·IEEEConst+1584(SB)/8,$0x000000015a422de6
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Feb 19 20:44:20 UTC 2024 - 113.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/shape_inference.cc
// Look for resource or variant element type and ensure we refine the subtype. // We only support a single subtype at the moment, we won't handle something // like: // tensor<!tf_type.variant<tensor<10xf32>, tensor<8xf32>> if (rhs_element_type_with_subtype && rhs_element_type_with_subtype.GetSubtypes().size() == 1) { auto lhs_element_type_with_subtype =
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Jun 08 07:28:49 UTC 2024 - 134.1K bytes - Viewed (0)