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Results 61 - 70 of 214 for add32a (0.12 sec)

  1. tensorflow/compiler/mlir/tfrt/tests/mlrt/while_to_map_fn.mlir

    // CHECK-NEXT: [[loop_counter:%.*]] = "tf.AddV2"(%arg2, [[cst_1]])
    // CHECK-NEXT: [[weight:%.*]] = "tf.ReadVariableOp"(%arg5)
    // CHECK-NEXT: [[mpy:%.*]] = "tf.MatMul"(%arg6, [[weight]])
    // CHECK-NEXT: [[element_index:%.*]] = "tf.AddV2"(%arg3, [[cst_1]])
    // CHECK-NEXT: [[bias:%.*]] = "tf.GatherV2"(%arg7, %arg3, [[cst_0]])
    // CHECK-NEXT: [[res:%.*]] = "tf.AddV2"([[mpy]], [[bias]])
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Apr 23 06:40:22 UTC 2024
    - 68.6K bytes
    - Viewed (0)
  2. src/internal/runtime/atomic/atomic_andor_test.go

    	var x [128]uint32 // give x its own cache line
    	sink = &x
    	for i := 0; i < b.N; i++ {
    		atomic.And32(&x[63], uint32(i))
    	}
    }
    
    func BenchmarkAnd32Parallel(b *testing.B) {
    	var x [128]uint32 // give x its own cache line
    	sink = &x
    	b.RunParallel(func(pb *testing.PB) {
    		i := uint32(0)
    		for pb.Next() {
    			atomic.And32(&x[63], i)
    			i++
    		}
    	})
    }
    
    func BenchmarkAnd64(b *testing.B) {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Apr 27 20:49:32 UTC 2024
    - 5.2K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/lite/quantization/tensorflow/tests/fallback_to_flex_ops_default.mlir

      %0 = "tf.Identity"(%cst) {device = ""} : (tensor<1xf32>) -> tensor<1xf32>
      %1 = "tf.AddV2"(%0, %cst_1) {device = ""} : (tensor<1xf32>, tensor<f32>) -> tensor<1xf32>
      %2 = "tf.Conv2DBackpropInput"(%arg0, %arg1, %arg2) {strides = [1, 2, 2, 1], padding="SAME", dilations=[1, 1, 1, 1]}: (tensor<4xi32>, tensor<3x3x1x32xf32>, tensor<15x14x14x32xf32>) -> tensor<15x28x28x1xf32>
      %3 = "tf.AddV2"(%2, %1): (tensor<15x28x28x1xf32>, tensor<1xf32>) -> tensor<15x28x28x1xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 13.4K bytes
    - Viewed (0)
  4. tensorflow/compiler/jit/xla_launch_util_test.cc

          *literal2, xla::LiteralUtil::CreateR2<int32_t>({{3, 4}})));
    }
    
    TEST_F(PjRtExecutionUtilTest, PopulateCtxOutputs) {
      XlaOpRegistry::RegisterCompilationKernels();
      TF_EXPECT_OK(NodeDefBuilder("AddV2", "AddV2")
                       .Input(FakeInput(DT_INT32))
                       .Input(FakeInput(DT_INT32))
                       .Attr("T", DT_INT32)
                       .Device("/job:localhost/replica:0/task:0/device:XLA_CPU:0")
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Feb 21 09:53:30 UTC 2024
    - 28.8K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/tensorflow/utils/bridge_logger_test.cc

    // Define test modules that are deserialized to module ops.
    static const char *const module_with_add =
        R"(module {
    func.func @main(%arg0: tensor<3x4x5xf32>, %arg1: tensor<3x4x5xf32>) -> tensor<3x4x5xf32> {
      %0 = "tf.AddV2"(%arg0, %arg1) : (tensor<3x4x5xf32>, tensor<3x4x5xf32>) -> tensor<3x4x5xf32>
      func.return %0 : tensor<3x4x5xf32>
    }
    }
    )";
    
    static const char *const module_with_sub =
        R"(module {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jun 06 04:50:13 UTC 2023
    - 6.7K bytes
    - Viewed (0)
  6. src/cmd/compile/internal/ssa/rewritedec64.go

    func rewriteValuedec64_OpMul64(v *Value) bool {
    	v_1 := v.Args[1]
    	v_0 := v.Args[0]
    	b := v.Block
    	typ := &b.Func.Config.Types
    	// match: (Mul64 x y)
    	// result: (Int64Make (Add32 <typ.UInt32> (Mul32 <typ.UInt32> (Int64Lo x) (Int64Hi y)) (Add32 <typ.UInt32> (Mul32 <typ.UInt32> (Int64Hi x) (Int64Lo y)) (Select0 <typ.UInt32> (Mul32uhilo (Int64Lo x) (Int64Lo y))))) (Select1 <typ.UInt32> (Mul32uhilo (Int64Lo x) (Int64Lo y))))
    	for {
    		x := v_0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Jan 19 22:42:34 UTC 2023
    - 65.3K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/quantization/tensorflow/tests/lift_hashtable_ops_as_args.mlir

        %3 = "tf.LookupTableSizeV2"(%1) {device = ""} : (tensor<!tf_type.resource>) -> tensor<i64>
        %4 = "tf.AddV2"(%2, %3) {device = ""} : (tensor<i64>, tensor<i64>) -> tensor<i64>
        %5 = "tf.LookupTableFindV2"(%0, %arg0, %cst) {device = ""} : (tensor<!tf_type.resource>, tensor<?x!tf_type.string>, tensor<i64>) -> tensor<*xi64>
        %6 = "tf.AddV2"(%5, %4) {device = ""} : (tensor<*xi64>, tensor<i64>) -> tensor<*xi64>
        return %6 : tensor<*xi64>
      }
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Mar 15 05:41:44 UTC 2024
    - 13.5K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/rewritegeneric.go

    					continue
    				}
    				v.reset(OpAdd32)
    				v.AddArg2(y, z)
    				return true
    			}
    		}
    		break
    	}
    	// match: (Add32 (Add32 i:(Const32 <t>) z) x)
    	// cond: (z.Op != OpConst32 && x.Op != OpConst32)
    	// result: (Add32 i (Add32 <t> z x))
    	for {
    		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
    			if v_0.Op != OpAdd32 {
    				continue
    			}
    			_ = v_0.Args[1]
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 22 18:24:47 UTC 2024
    - 812.2K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/tensorflow/tests/optimize-arg-operand-constraint.mlir

    attributes  {tf.entry_function = {inputs = "input", outputs = "output_node"}} {
      %0 = arith.constant dense<2.000000e+00> : tensor<f32>
      %1 = arith.constant dense<1.000000e+00> : tensor<f32>
      %2 = "tf.AddV2"(%arg0, %1) {T = "tfdtype$DT_FLOAT", device = "", name = "StatefulPartitionedCall/add"} : (tensor<1xf32>, tensor<f32>) -> tensor<1xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Mar 24 05:47:26 UTC 2022
    - 719 bytes
    - Viewed (0)
  10. src/cmd/compile/internal/ssa/deadstore_test.go

    			Valu("addr1", OpAddr, ptrType, 0, nil, "sb"),
    			Valu("addr2", OpAddr, ptrType, 0, nil, "sb"),
    			Valu("addr3", OpAddr, ptrType, 0, nil, "sb"),
    			Valu("zero1", OpZero, types.TypeMem, 1, c.config.Types.Bool, "addr3", "start"),
    			Valu("store1", OpStore, types.TypeMem, 0, c.config.Types.Bool, "addr1", "v", "zero1"),
    			Valu("store2", OpStore, types.TypeMem, 0, c.config.Types.Bool, "addr2", "v", "store1"),
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Apr 25 20:07:26 UTC 2024
    - 5.6K bytes
    - Viewed (0)
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