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Results 81 - 83 of 83 for Dc (0.03 sec)
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src/cmd/internal/obj/arm64/asm7.go
SPOP_RVALE3IS: {6, 8, 2, 5, true}, SPOP_RVAE3OS: {6, 8, 5, 1, true}, SPOP_RVALE3OS: {6, 8, 5, 5, true}, SPOP_RVAE3: {6, 8, 6, 1, true}, SPOP_RVALE3: {6, 8, 6, 5, true}, // DC SPOP_IVAC: {0, 7, 6, 1, true}, SPOP_ISW: {0, 7, 6, 2, true}, SPOP_CSW: {0, 7, 10, 2, true}, SPOP_CISW: {0, 7, 14, 2, true}, SPOP_ZVA: {3, 7, 4, 1, true},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 201.1K bytes - Viewed (0) -
RELEASE.md
Anthony Barbier, Anton Kachatkou, Anubh-V, Anuja Jakhade, Artem Ryabov, autoih, Bairen Yi, Bas Aarts, Basit Ayantunde, Ben Barsdell, Bhavani Subramanian, Brett Koonce, candy.dc, Captain-Pool, caster, cathy, Chong Yan, Choong Yin Thong, Clayne Robison, Colle, Dan Ganea, David Norman, David Refaeli, dengziming, Diego Caballero, Divyanshu, djshen, Douman, Duncan Riach, EFanZh, Elena Zhelezina,
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 11 23:24:08 UTC 2024 - 730.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/optimize.mlir
// CHECK-NEXT: %[[dc:.*]] = "tfl.depthwise_conv_2d"(%arg0, %[[w]], %[[b]]) <{depth_multiplier = 4 : i32, dilation_h_factor = 2 : i32, dilation_w_factor = 3 : i32, fused_activation_function = "NONE", padding = "VALID", stride_h = 4 : i32, stride_w = 5 : i32}> : (tensor<256x32x32x3xf32>, tensor<3x3x3x16xf32>, tensor<16xf32>) -> tensor<256x30x30x16xf32> // CHECK-NEXT: return %[[dc]] : tensor<256x30x30x16xf32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 16 20:31:41 UTC 2024 - 284.1K bytes - Viewed (0)