{259, "EDC5259I", "A CUN_RS_NO_CONVERSION error was issued by Unicode Services."},
	{260, "EDC5260I", "A CUN_RS_TABLE_NOT_ALIGNED error was issued by Unicode Services."},
	{262, "EDC5262I", "An iconv() function encountered an unexpected error while using Unicode Services."},
	{265, "EDC5265I", "The named attribute not available."},
	{1000, "EDC8000I", "A bad socket-call constant was found in the IUCV header."},

      auto pad_output_type = UnrankedTensorType::get(elem_type);
      input = rewriter.create<TF::PadOp>(op->getLoc(), pad_output_type, input,
                                         padding_const);

      // Set Conv padding to `VALID` since padding has been handled by Pad op.
      state.padding = rewriter.getStringAttr("VALID");
    }
    auto conv_op = static_cast<const ConcreteType *>(this)->createTFLOp(

    ConstBoolAttrTrue, $asymmetric_quantize_inputs),
  [(HasRank<2> $input),
   (AreLastTwoDimsTransposed $perm_value),
   (IsBoolAttrEqual<"false"> $adj_y)]>;

// Replace conv-->transpose-->add with conv-->add-->transpose
// The bias needs only reshape (i.e. ReshapeNCHWBiasToNHWC) and not transpose
// because the bias's shape simply changes from NxCx1x1 to Nx1x1xC.
def ReorderNCHWTransposeAdd : Pat <

};

using ConvertConv2DDynamic =
    ConvertConvDynamic<TF::Conv2DOp, /*num_spatial_dims=*/2>;

// Converts the TensorFlow conv op in template to the generic HLO conv op by
// converting TensorFlow op attributes to HLO op attributes.
//
// Sample result for Conv2D:
//
//   %conv = "mhlo.convolution"(%input, %filter) {
//     strides = [1, 2],
//     paddings = [[1, 0], [1, 1]],
//     ...
//   }
//

	uint32Type *_type = efaceOf(&uint32Eface)._type
	uint64Type *_type = efaceOf(&uint64Eface)._type
	stringType *_type = efaceOf(&stringEface)._type
	sliceType  *_type = efaceOf(&sliceEface)._type
)

// The conv and assert functions below do very similar things.
// The convXXX functions are guaranteed by the compiler to succeed.
// The assertXXX functions may fail (either panicking or returning false,

  // For now, restrict scale adjustment to ops with affine quantized weights,
  // and having weights and biases as constants. This currently only applies to
  // FC and Conv* ops. Restriction for the weight can be relaxed if there are
  // needs for adjusting scale of variable weights.
  auto affine_op = dyn_cast<AffineQuantizedOpInterface>(op);

  // CHECK-DAG: %[[ONE:.*]] = mhlo.constant dense<1.000000e+00> : tensor<f32>
  // CHECK: %[[CONV:.*]] = mhlo.convert %arg0 : (tensor<3xi32>) -> tensor<3xi64>
  // CHECK: %[[F32:.*]] = "mhlo.rng"(%[[ZERO]], %[[ONE]], %[[CONV]]) {{.*UNIFORM.*}} -> tensor<12x?x64xf32>
  %0 = "tf.RandomUniform"(%arg0) : (tensor<3xi32>) -> tensor<12x?x64xf32>
  // CHECK: return %[[F32]]

            (i != out_batch_dim && out_type.isDynamicDim(i))) {
          return false;
        }
      }
    }

    // All ones in "lhs_dilation" means this "mhlo.conv" op should be
    // converted to "tf.Conv2D" or "tf.DepthwiseConv2dNativeOp".
    auto lhs_dilation = conv_op.getLhsDilation().value();
    if (!lhs_dilation.isSplat() || lhs_dilation.getSplatValue<int64_t>() != 1)

  // CHECK: %[[dq:.*]] = "tfl.dequantize"(%[[q]])
  // CHECK: %[[conv:.*]] = "tfl.conv_2d"(%arg0, %[[dq]], %[[cst]])
  // CHECK: return %[[conv]] : tensor<256x8x7x3xf32>
}

// CHECK-LABEL: @fuseMulIntoFullyConnectedWithOptionalAttribute

    // Replace filter uses with uniform quantized filter.
    rewriter.replaceAllUsesWith(filter_op->getResult(0),
                                quantized_filter_constant_op.getResult());

    // Replace conv op with a new convolution op that has quantized output type.
    // Quantize -> Dequantize following r3.
    auto output_uniform_quantize_call_op = cast<func::CallOp>(
        *combined_scale_multiply_op.getResult().user_begin());