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Results 31 - 40 of 129 for Shift3 (0.31 sec)
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src/math/big/float.go
// TODO(gri) having a combined add-and-shift primitive // could make this code significantly faster switch { case ex < ey: if al { t := nat(nil).shl(y.mant, uint(ey-ex)) z.mant = z.mant.add(x.mant, t) } else { z.mant = z.mant.shl(y.mant, uint(ey-ex)) z.mant = z.mant.add(x.mant, z.mant) } default: // ex == ey, no shift needed z.mant = z.mant.add(x.mant, y.mant)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Jun 06 15:46:54 UTC 2024 - 44.5K bytes - Viewed (0) -
staging/src/k8s.io/apiextensions-apiserver/test/integration/fieldselector_test.go
expectedByName: sets.New("shirt1", "shirt3"), expectObserveRemoval: sets.New("shirt1"), // shirt 1 is deleted }, { version: version, fieldSelector: "spec.size=M", expectedByName: sets.New("shirt2"), }, { version: version, fieldSelector: "spec.branded=false", expectedByName: sets.New("shirt2", "shirt3"), }, {
Registered: Sat Jun 15 01:39:40 UTC 2024 - Last Modified: Mon May 06 15:53:03 UTC 2024 - 27K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewrite.go
} func newPPC64ShiftAuxInt(sh, mb, me, sz int64) int32 { if sh < 0 || sh >= sz { panic("PPC64 shift arg sh out of range") } if mb < 0 || mb >= sz { panic("PPC64 shift arg mb out of range") } if me < 0 || me >= sz { panic("PPC64 shift arg me out of range") } return int32(sh<<16 | mb<<8 | me) } func GetPPC64Shiftsh(auxint int64) int64 {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 64.2K bytes - Viewed (0) -
src/cmd/internal/obj/link.go
// Encoding: // type = TYPE_TEXTSIZE // offset = x // val = int32(y) // // reg<<shift, reg>>shift, reg->shift, reg@>shift // Shifted register value, for ARM and ARM64. // In this form, reg must be a register and shift can be a register or an integer constant. // Encoding: // type = TYPE_SHIFT // On ARM: // offset = (reg&15) | shifttype<<5 | count
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 19:57:43 UTC 2024 - 33.1K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/obj9.go
val := p.From.Offset shift := bits.TrailingZeros64(uint64(val)) mask := int64(0xFFFF) << shift if val&mask == val || (val>>(shift+16) == -1 && (val>>shift)<<shift == val) { // Rewrite this value into MOVD $const>>shift, Rto; SLD $shift, Rto q := obj.Appendp(p, c.newprog) q.As = ASLD q.From.SetConst(int64(shift)) q.To = p.To p.From.Offset >>= shift p = q
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 18:17:17 UTC 2024 - 40.8K bytes - Viewed (0) -
src/math/big/int_test.go
out := new(Int).Lsh(in, test.shift) out = out.Rsh(out, test.shift) if !isNormalized(out) { t.Errorf("#%d: %v is not normalized", i, *out) } if in.Cmp(out) != 0 { t.Errorf("#%d: got %s want %s", i, out, in) } } for i, test := range lshTests { in, _ := new(Int).SetString(test.in, 10) out := new(Int).Lsh(in, test.shift) out.Rsh(out, test.shift)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 18:42:28 UTC 2024 - 58.5K bytes - Viewed (0) -
test/codegen/arithmetic.go
d = divd / divr // amd64:-"JMP" // 386:-"JMP" e = divd % divr d += e } return d, e } // Check that len() and cap() calls divided by powers of two are // optimized into shifts and ands func LenDiv1(a []int) int { // 386:"SHRL\t[$]10" // amd64:"SHRQ\t[$]10" // arm64:"LSR\t[$]10",-"SDIV" // arm:"SRL\t[$]10",-".*udiv" // ppc64x:"SRD"\t[$]10" return len(a) / 1024 }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 15:28:00 UTC 2024 - 15.2K bytes - Viewed (0) -
build/common.sh
Registered: Sat Jun 15 01:39:40 UTC 2024 - Last Modified: Thu Jun 06 16:13:15 UTC 2024 - 26.5K bytes - Viewed (0) -
src/make.rc
rm -f ./runtime/runtime_defs.go # Determine the host compiler toolchain. eval `{grep '^(CC|LD|O)=' /$objtype/mkfile} vflag=() if(~ $1 -v) { vflag=(-v) shift } fn bootstrapenv { GOROOT=$GOROOT_BOOTSTRAP GO111MODULE=off GOENV=off GOOS=() GOARCH=() GOEXPERIMENT=() GOFLAGS=() $* } bootgo = 1.20.6 GOROOT = `{cd .. && pwd} goroot_bootstrap_set = 'true'
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 29 13:48:46 UTC 2024 - 3.7K bytes - Viewed (0) -
src/cmd/compile/internal/ppc64/ssa.go
case ssa.OpPPC64CLRLSLWI: r := v.Reg() r1 := v.Args[0].Reg() shifts := v.AuxInt p := s.Prog(v.Op.Asm()) // clrlslwi ra,rs,mb,sh will become rlwinm ra,rs,sh,mb-sh,31-sh as described in ISA p.From = obj.Addr{Type: obj.TYPE_CONST, Offset: ssa.GetPPC64Shiftmb(shifts)} p.AddRestSourceConst(ssa.GetPPC64Shiftsh(shifts)) p.Reg = r1 p.To.Type = obj.TYPE_REG p.To.Reg = r case ssa.OpPPC64CLRLSLDI:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 55.4K bytes - Viewed (0)