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Results 21 - 30 of 36 for MOVWZ (0.21 sec)

  1. src/runtime/asm_s390x.s

    	MOVD	(R12), R8;			\
    	PCDATA  $PCDATA_StackMapIndex, $0;	\
    	BL	(R8);				\
    	/* copy return values back */		\
    	MOVD	stackArgsType+0(FP), R7;		\
    	MOVD	stackArgs+16(FP), R6;			\
    	MOVWZ	stackArgsSize+24(FP), R5;			\
    	MOVD	$stack-MAXSIZE(SP), R4;		\
    	MOVWZ	stackRetOffset+28(FP), R1;		\
    	ADD	R1, R4;				\
    	ADD	R1, R6;				\
    	SUB	R1, R5;				\
    	BL	callRet<>(SB);			\
    	RET
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Jan 25 09:18:28 UTC 2024
    - 28.1K bytes
    - Viewed (0)
  2. test/codegen/comparisons.go

    	// s390x:`MOVHBR\t\(.*\), [R]`,`CMPW\t.*, [$]`
    	return s == "xx"
    }
    
    func CompareString2(s string) bool {
    	// amd64:`CMPL\t\(.*\), [$]`
    	// arm64:`MOVWU\t\(.*\), [R]`,`CMPW\t.*, [R]`
    	// ppc64le:`MOVWZ\t\(.*\), [R]`,`CMPW\t.*, [R]`
    	// s390x:`MOVWBR\t\(.*\), [R]`,`CMPW\t.*, [$]`
    	return s == "xxxx"
    }
    
    func CompareString3(s string) bool {
    	// amd64:`CMPQ\t\(.*\), [A-Z]`
    	// arm64:-`CMPW\t`
    	// ppc64x:-`CMPW\t`
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Apr 19 16:31:02 UTC 2024
    - 15.2K bytes
    - Viewed (0)
  3. src/runtime/memmove_ppc64x.s

    checkbytes:
    	BC	12, 14, LR		// BEQ lr
    #ifdef GOPPC64_power10
    	SLD	$56, BYTES, TMP
    	LXVL	SRC, TMP, V0
    	STXVL	V0, TGT, TMP
    	RET
    #endif
    lt8:	// Move word if possible
    	CMP BYTES, $4
    	BLT lt4
    	MOVWZ 0(SRC), TMP
    	ADD $-4, BYTES
    	MOVW TMP, 0(TGT)
    	ADD $4, SRC
    	ADD $4, TGT
    lt4:	// Move halfword if possible
    	CMP BYTES, $2
    	BLT lt2
    	MOVHZ 0(SRC), TMP
    	ADD $-2, BYTES
    	MOVH TMP, 0(TGT)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Apr 21 16:47:45 UTC 2023
    - 4.9K bytes
    - Viewed (0)
  4. test/codegen/bits.go

    	io64[2] = (io64[2] >> 4) & 0x0000FFFFFFFFFFFF
    	// ppc64x: -"SRD", -"AND", "RLDICL\t[$]36, R[0-9]*, [$]28, R"
    	io64[3] = (io64[3] >> 28) & 0x0000FFFFFFFFFFFF
    
    	// ppc64x: "MOVWZ", "RLWNM\t[$]1, R[0-9]*, [$]28, [$]3, R"
    	io64[4] = uint64(bits.RotateLeft32(io32[0], 1) & 0xF000000F)
    
    	// ppc64x: "RLWNM\t[$]0, R[0-9]*, [$]4, [$]19, R"
    	io32[0] = io32[0] & 0x0FFFF000
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 7.8K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/_gen/S390XOps.go

    		{name: "MOVWreg", argLength: 1, reg: gp11sp, asm: "MOVW", typ: "Int64"},    // sign extend arg0 from int32 to int64
    		{name: "MOVWZreg", argLength: 1, reg: gp11sp, asm: "MOVWZ", typ: "UInt64"}, // zero extend arg0 from int32 to int64
    
    		{name: "MOVDconst", reg: gp01, asm: "MOVD", typ: "UInt64", aux: "Int64", rematerializeable: true}, // auxint
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Feb 24 00:21:13 UTC 2023
    - 52.5K bytes
    - Viewed (0)
  6. src/crypto/aes/gcm_ppc64x.s

    	BLT	next4
    	MOVD	0(MASK_PTR), R14
    	MOVD	0(BLK_INP), R15
    	XOR	R14, R15, R14
    	MOVD	R14, 0(BLK_OUT)
    	ADD	$8, R16
    	ADD	$-8, IN_LEN
    next4:
    	CMP	IN_LEN, $4
    	BLT	next2
    	MOVWZ	(BLK_INP)(R16), R15
    	MOVWZ	(MASK_PTR)(R16), R14
    	XOR	R14, R15, R14
    	MOVW	R14, (R16)(BLK_OUT)
    	ADD	$4, R16
    	ADD	$-4, IN_LEN
    next2:
    	CMP	IN_LEN, $2
    	BLT	next1
    	MOVHZ	(BLK_INP)(R16), R15
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 27.1K bytes
    - Viewed (0)
  7. src/runtime/asm_ppc64x.s

    #endif						\
    	/* copy return values back */		\
    	MOVD	regArgs+40(FP), R20;		\
    	BL	runtime·spillArgs(SB);			\
    	MOVD	stackArgsType+0(FP), R7;		\
    	MOVD	stackArgs+16(FP), R3;			\
    	MOVWZ	stackArgsSize+24(FP), R4;			\
    	MOVWZ	stackRetOffset+28(FP), R6;		\
    	ADD	$FIXED_FRAME, R1, R5;		\
    	ADD	R6, R5; 			\
    	ADD	R6, R3;				\
    	SUB	R6, R4;				\
    	BL	callRet<>(SB);			\
    	RET
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 18:17:17 UTC 2024
    - 45.4K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/_gen/PPC64Ops.go

    		{name: "MOVWreg", argLength: 1, reg: gp11, asm: "MOVW", typ: "Int64"},   // sign extend int32 to int64
    		{name: "MOVWZreg", argLength: 1, reg: gp11, asm: "MOVWZ", typ: "Int64"}, // zero extend uint32 to uint64
    
    		// Load bytes in the endian order of the arch from arg0+aux+auxint into a 64 bit register.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 43.8K bytes
    - Viewed (0)
  9. src/cmd/internal/obj/ppc64/doc.go

    is updated by the value in the index register.
    
    Examples:
    
    	MOVD (R3), R4		<=>	ld r4,0(r3)
    	MOVW (R3), R4		<=>	lwa r4,0(r3)
    	MOVWZU 4(R3), R4		<=>	lwzu r4,4(r3)
    	MOVWZ (R3+R5), R4		<=>	lwzx r4,r3,r5
    	MOVHZ  (R3), R4		<=>	lhz r4,0(r3)
    	MOVHU 2(R3), R4		<=>	lhau r4,2(r3)
    	MOVBZ (R3), R4		<=>	lbz r4,0(r3)
    
    	MOVD R4,(R3)		<=>	std r4,0(r3)
    	MOVW R4,(R3)		<=>	stw r4,0(r3)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Apr 21 16:47:45 UTC 2023
    - 11.3K bytes
    - Viewed (0)
  10. src/cmd/internal/notsha256/sha256block_ppc64x.s

    	MOVD	p_len+16(FP), LEN
    
    	SRD	$6, LEN
    	SLD	$6, LEN
    	ADD	INP, LEN, END
    
    	CMP	INP, END
    	BEQ	end
    
    	MOVD	$·kcon(SB), TBL_STRT
    	MOVD	$0x10, R_x010
    
    #ifdef GOARCH_ppc64le
    	MOVWZ	$8, TEMP
    	LVSL	(TEMP)(R0), LEMASK
    	VSPLTISB	$0x0F, KI
    	VXOR	KI, LEMASK, LEMASK
    #endif
    
    	LXVW4X	(CTX)(R_x000), V0
    	LXVW4X	(CTX)(R_x010), V4
    
    	// unpack the input values into vector registers
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 14.5K bytes
    - Viewed (0)
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