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Results 11 - 20 of 36 for NCHW (0.11 sec)

  1. tensorflow/compiler/mlir/lite/stablehlo/transforms/composite_utils.h

        const DenseIntElementsAttr& dense_attr, PatternRewriter& builder);
    
    // Returns a NHWC shaped type from an NCHW shaped type op.
    // For example- Given a Composite op that wraps a core.aten.avg_pool2d, this
    // returns the return type of the tfl.average_pool_2d emitted. Note that the
    // aten.avg_pool2d works with the NCHW layout while tfl.average_pool_2d assumes
    // NHWC.
    ShapedType GetNhwcReturnTypeFromNchw(Operation* old_op);
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 29 18:33:05 UTC 2024
    - 3.4K bytes
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  2. tensorflow/compiler/mlir/quantization/common/attrs_and_constraints.h

    inline constexpr StringRef kQuantizationMethodAttr = "_quantization_method";
    
    // Permutation from the NHWC tensor format to NCHW. This is an inverse
    // permutation of `kNchwToNhwcPermutation`.
    inline constexpr std::array<int64_t, 4> kNhwcToNchwPermutation = {0, 3, 1, 2};
    
    // Permutation from the NCHW tensor format to NHWC. This is an inverse
    // permutation of `kNchwToNhwcPermutation`.
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 9.9K bytes
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  3. tensorflow/compiler/mlir/tensorflow/ir/tf_ops_a_m.cc

      // Also FusedBatchNorm in training mode prefers NCHW data format. Check if all
      // users can efficiently use NHWC data format?
      if (one_by_one && trivial_strides && trivial_dilations) {
        return "NHWC";
      }
    
      // If filter spatial dimensions are unknown or not 1x1 we prefer NCHW, because
      // it's the fastest option on NVIDIA GPUs with cuDNN library support.
      return "NCHW";
    }
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 146.7K bytes
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  4. tensorflow/compiler/mlir/lite/stablehlo/transforms/composite_utils.cc

    ShapedType GetNhwcReturnTypeFromNchw(Operation* old_op) {
      auto composite_result_shape =
          mlir::cast<ShapedType>(old_op->getResults().front().getType()).getShape();
      std::array<int64_t, 4> output_shape;
      // NHWC <- NCHW
      output_shape[0] = composite_result_shape[0];
      output_shape[1] = composite_result_shape[2];
      output_shape[2] = composite_result_shape[3];
      output_shape[3] = composite_result_shape[1];
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 29 18:33:05 UTC 2024
    - 3.4K bytes
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  5. tensorflow/compiler/mlir/quantization/stablehlo/cc/pass_pipeline.h

    // through a StableHLO <-> MHLO roundtrip to utilize the MHLOQuantToInt pass.
    void AddStablehloQuantToIntPasses(OpPassManager& pm);
    
    // Processes tensors with NCHW format (== (batch, channel, height, weight)) by
    // converting them to NHWC formats along with extra optimizations such as
    // constant folding the transpose->convolution pattern. This is useful when
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Apr 15 12:53:33 UTC 2024
    - 3.6K bytes
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  6. tensorflow/compiler/mlir/quantization/stablehlo/tests/passes/nchw_convolution_to_nhwc.mlir

    // RUN: stablehlo-quant-opt %s -stablehlo-nchw-convolution-to-nhwc \
    // RUN:   -split-input-file -verify-diagnostics | FileCheck %s
    
    // Tests that `stablehlo.transpose` ops are inserted for each of input, filter,
    // and output.
    // Output dimension numbers =  [b, 0, 1, f]x[0, 1, i, o]->[b, 0, 1, f]
    
    // CHECK-LABEL: nchw_conv
    // CHECK-SAME: %[[ARG:.+]]: tensor<1x8x4x4xf32>
    func.func @nchw_conv(%arg0: tensor<1x8x4x4xf32>) -> tensor<1x8x4x4xf32> {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Mar 25 23:00:47 UTC 2024
    - 5.5K bytes
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  7. tensorflow/compiler/mlir/lite/stablehlo/transforms/composite_lowering_patterns.td

          ConstBoolAttrFalse,
          ConstBoolAttrTrue),
        [(IsNhwcLayoutOp $attrs)]>;
    
    // pattern to lower a stablehlo.composite of `jax` and `pytorch` image resize fuctions
    // in `nearest`mode and with NCHW inputs to a tflite.resize_nearest_neighbor op.
    // TODO(b/343278954): Move the creation of transposes to a separate prepare pass
    // to avoid creating multiple pattern-rewrite rules for the same composite op.
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jun 06 18:45:51 UTC 2024
    - 4.6K bytes
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  8. tensorflow/compiler/mlir/tensorflow/ir/tf_op_interfaces.td

        attribute, that gives a meaning to the data inside arguments and results.
    
        Currently supported data formats (layouts):
          - NHWC : channels last  [batch, height, width, channels]
          - NCHW : channels first [batch, channels, height, width]
    
        Layout sensitive ops might have different preferred (and supported) layouts
        depending on arguments shape/type and execution device (CPU or GPU).
      }];
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Nov 30 19:07:07 UTC 2022
    - 6.2K bytes
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  9. tensorflow/compiler/mlir/quantization/stablehlo/passes/nchw_convolution_to_nhwc.cc

    class NchwConvolutionToNhwcPass
        : public impl::NchwConvolutionToNhwcPassBase<NchwConvolutionToNhwcPass> {
     private:
      void runOnOperation() override;
    };
    
    // Rewrites NCHW convolution to NHWC.
    // * Src dimension numbers: [b, f, 0, 1]x[o, i, 0, 1]->[b, f, 0, 1]
    // * Dst dimension numbers: [b, 0, 1, f]x[0, 1, i, o]->[b, 0, 1, f]
    class RewriteNchwConvolutionToNhwc
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
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  10. tensorflow/compiler/mlir/quantization/stablehlo/tests/components/pre_calibration_component.mlir

    // CHECK: return %[[CUSTOM_AGGREGATOR_1]] : tensor<1x3xf32>
    // CHECK: }
    // CHECK: }
    
    // -----
    
    // Tests that `stablehlo.convolution` with NCHW format is converted to NHWC.
    
    func.func @main(%arg0: tensor<1x8x4x4xf32>) -> tensor<1x8x4x4xf32> {
      %0 = stablehlo.constant() {value = dense<3.000000e+00> : tensor<8x8x3x3xf32>} : () -> tensor<8x8x3x3xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri May 10 04:07:09 UTC 2024
    - 5.1K bytes
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