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Results 21 - 30 of 247 for i64 (0.1 sec)

  1. tensorflow/compiler/mlir/tensorflow/tests/constant_op_device_assignment.mlir

      // CHECK-NEXT: %[[RESULT_0:.*]] = "tf.Const"() <{value = dense<1> : tensor<i64>}> : () -> tensor<i64>
      // CHECK-NEXT: %[[RESULT_1:.*]] = "tf.AddV2"(%[[RESULT_0]], %[[RESULT_0]]) : (tensor<i64>, tensor<i64>) -> tensor<i64>
      %0 = "tf.Const"() {value = dense<1> : tensor<i64>} : () -> tensor<i64>
      %1 = "tf.AddV2"(%0, %0) : (tensor<i64>, tensor<i64>) -> tensor<i64>
      func.return
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 1.5K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/quantization/tensorflow/tests/lift_hashtable_ops_as_args.mlir

        %4 = "tf.AddV2"(%2, %3) {device = ""} : (tensor<i64>, tensor<i64>) -> tensor<i64>
        %5 = "tf.LookupTableFindV2"(%0, %arg0, %cst) {device = ""} : (tensor<!tf_type.resource>, tensor<?x!tf_type.string>, tensor<i64>) -> tensor<*xi64>
        %6 = "tf.AddV2"(%5, %4) {device = ""} : (tensor<*xi64>, tensor<i64>) -> tensor<*xi64>
        return %6 : tensor<*xi64>
      }
    // Check that HashTable op is lifted.
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Mar 15 05:41:44 UTC 2024
    - 13.5K bytes
    - Viewed (0)
  3. tensorflow/compiler/mlir/tfrt/tests/analysis/cost_analysis.mlir

        %9 = "tf.StridedSlice"(%8, %5, %4, %4) {begin_mask = 0 : i64, device = "/job:localhost/replica:0/task:0/device:CPU:0", ellipsis_mask = 0 : i64, end_mask = 0 : i64, new_axis_mask = 0 : i64, shrink_axis_mask = 1 : i64} : (tensor<4xi32>, tensor<1xi32>, tensor<1xi32>, tensor<1xi32>) -> tensor<i32>
        // expected-remark@+1 {{Cost: 1}}
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Aug 14 15:35:49 UTC 2023
    - 12.2K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/tf2xla/api/v2/testdata/outside_compilation.mlir

          %outputs_57, %control_58 = tf_executor.island wraps "tf.AsString"(%outputs_55) {device = "/device:CPU:0", fill = "", precision = -1 : i64, scientific = false, shortest = false, width = -1 : i64} : (tensor<*xi32>)...
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Oct 19 20:19:45 UTC 2023
    - 21.9K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/quantization/stablehlo/tests/pipelines/process_nchw_tensor.mlir

    // CHECK: %[[ADD:.+]] = stablehlo.add %[[CONV]], %[[BIAS_CONST]] : tensor<1x5x5x4xf32>
    // CHECK: %[[REDUCE_WINDOW_MAX:.+]] = "stablehlo.reduce_window"(%[[ADD]], %[[INIT_VALUE_CONST:.+]])
    // CHECK: <{window_dimensions = array<i64: 1, 2, 2, 1>, window_strides = array<i64: 1, 2, 2, 1>}>
    // CHECK: stablehlo.maximum
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 18 20:32:46 UTC 2024
    - 12.6K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/tensorflow/tests/embedding_pipelining.mlir

        "tf.AssignAddVariableOp"(%37, %cst_12) {_has_manual_control_dependencies = true, _replication_info = "while/cluster_while_body_451", _xla_compile_device_type = "TPU", device = ""} : (tensor<*x!tf_type.resource<tensor<i64>>>, tensor<i64>) -> ()
    
        return %res_n, %arg1 : tensor<i32>, tensor<*x!tf_type.resource<tensor<i64>>>
      }
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 33.1K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/lite/tests/prepare-tf.mlir

      // CHECK-SAME: begin_mask = 7 : i64
      // CHECK-SAME: ellipsis_mask = 0 : i64
      // CHECK-SAME: end_mask = 14 : i64
      // CHECK-SAME: new_axis_mask = 0 : i64
      // CHECK-SAME: shrink_axis_mask = 0 : i64
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed May 29 07:26:59 UTC 2024
    - 59.8K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/tfrt/tests/tf_to_corert/batch_function_deduplicate.mlir

    {_xla_inferred_shapes = [#tf_type.shape<*>, #tf_type.shape<*>], allowed_batch_sizes = [64, 128, 256], batch_timeout_micros = 5000 : i64, batching_queue = "", container = "", device = "/job:localhost/replica:0/task:0/device:CPU:0", enable_large_batch_splitting = true, f = @compute_0, max_batch_size = 256 : i64, max_enqueued_batches = 10000 : i64, num_batch_threads = 2 : i64, operandSegmentSizes = array<i32: 1, 1>, shared_name = "computation"} : (tensor<?x?xi32>, tensor<?x?xi32>) -> (tensor<*xi32>, tensor<*xi32>)...
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Aug 14 15:35:49 UTC 2023
    - 3.5K bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/tensorflow_to_stablehlo/tests/test_tf_to_stablehlo.mlir

            quantization_axis = -1 : i64, quantization_min_val = -128 : i64, quantization_max_val = 127 : i64
          } : (tensor<?xf32>, tensor<f32>, tensor<i32>) -> tensor<?x!tf_type.qint8>
          %1 = "tf.UniformDequantize"(%0, %scales, %zps) {
            quantization_axis = -1 : i64, quantization_min_val = -128 : i64, quantization_max_val = 127 : i64
          } : (tensor<?x!tf_type.qint8>, tensor<f32>, tensor<i32>) -> tensor<?xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue May 21 22:58:42 UTC 2024
    - 1.5K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/tensorflow/tests/replicate_to_island.mlir

                tf_device.return %5: tensor<i64>
              }) {device = "/TPU:2"} : () -> (tensor<i64>)
              tf_device.return %4 : tensor<i64>
            }) : () -> (tensor<i32>, tensor<i64>)
            tf_device.return %3#0, %3#1 : tensor<i32>, tensor<i64>
          }
          tf_executor.yield %2#0, %2#1, %2#2, %2#3 : tensor<i32>, tensor<i32>, tensor<i64>, tensor<i64>
        }
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Oct 31 08:59:10 UTC 2023
    - 15.1K bytes
    - Viewed (0)
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