case 66: // am* From, To, RegTo2 ==> am* RegTo2, From, To
		rk := p.From.Reg
		rj := p.To.Reg
		rd := p.RegTo2

		// See section 2.2.7.1 of https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html
		// for the register usage constraints.
		if rd == rj || rd == rk {
			c.ctxt.Diag("illegal register combination: %v\n", p)
		}
		o1 = OP_RRR(atomicInst[p.As], uint32(rk), uint32(rj), uint32(rd))
	}

		}
		volsInfo = append(volsInfo, VolInfo{
			Name: pathutil.Clean(entry),
		})
	}
	return volsInfo, nil
}

// StatVol - get volume info.
func (s *xlStorage) StatVol(ctx context.Context, volume string) (vol VolInfo, err error) {
	// Verify if volume is valid and it exists.
	volumeDir, err := s.getVolDir(volume)
	if err != nil {
		return VolInfo{}, err
	}

	// Stat a volume entry.
	var st os.FileInfo