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Results 11 - 20 of 23 for add32a (0.1 sec)
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tensorflow/compiler/mlir/tensorflow/tests/lower_tf.mlir
// CHECK: %[[SUM0:.*]] = "tf.AddV2"(%arg0, %arg1) // CHECK: %[[SUM1:.*]] = "tf.AddV2"(%arg2, %arg3) // CHECK: %[[SUM2:.*]] = "tf.AddV2"(%[[SUM0]], %[[SUM1]]) // CHECK: %[[SUM3:.*]] = "tf.AddV2"(%[[SUM2]], %arg4) // return %[[SUM3]]
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Jan 05 18:35:42 UTC 2024 - 92K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/lower_tf.cc
// // is lowered to: // // %sum0 = "tf.AddV2"(%0, %1) // %result = "tf.AddV2"(%sum0, %2) // // While // // %result = "tf.AddN"(%0, %1, %2, %3, %4) // // is lowered to: // // %sum0 = "tf.AddV2"(%0, %1) // %sum1 = "tf.AddV2"(%2, %3) // %sum2 = "tf.AddV2"(%sum0, %sum1) // %result = "tf.AddV2"(%sum2, %4) // class LowerAddNOp : public RewritePattern { public:
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 74.9K bytes - Viewed (0) -
platforms/core-configuration/file-collections/src/test/groovy/org/gradle/api/internal/file/collections/DefaultConfigurableFileCollectionSpec.groovy
Registered: Wed Jun 12 18:38:38 UTC 2024 - Last Modified: Mon Mar 18 17:09:50 UTC 2024 - 53K bytes - Viewed (0) -
tensorflow/compiler/jit/mark_for_compilation_pass_test.cc
ops::Switch switch_b(root.WithOpName("switch_b"), value, cond_b); Output add_a = ops::Add(root.WithOpName("add_a"), switch_a.output_true, switch_b.output_true); Output add_b = ops::Add(root.WithOpName("add_b"), switch_a.output_true, switch_b.output_true); Output add = ops::Add(root.WithOpName("add_c"), add_a, add_b); std::unique_ptr<Graph> graph(new Graph(OpRegistry::Global()));
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Feb 14 10:11:10 UTC 2024 - 79.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/prepare-tf.mlir
%0 = "tf.AddV2"(%arg0, %arg1) : (tensor<ui32>, tensor<ui32>) -> tensor<ui32> func.return %0 : tensor<ui32> // CHECK-LABEL: add_v2_uint32 // CHECK: %[[CAST:.*]] = "tf.Cast"(%arg0) <{Truncate = false}> : (tensor<ui32>) -> tensor<i32> // CHECK: %[[CAST1:.*]] = "tf.Cast"(%arg1) <{Truncate = false}> : (tensor<ui32>) -> tensor<i32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 29 07:26:59 UTC 2024 - 59.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/g3doc/_includes/tf_passes.md
%add1 = "tf.Add"(%arg0, %arg1) : (tensor<*xi32>, tensor<i32>) -> tensor<*xi32> %add2 = "tf.Add"(%add1, %arg1) : (tensor<*xi32>, tensor<i32>) -> tensor<*xi32> %res = "tf.Print"(%add2) { message = "add result" } : (tensor<*xi32>) -> (tensor<*xi32>) tf_executor.yield %add1, %add2 : tensor<*xi32>, tensor<*xi32> } tf_executor.fetch %island1#0, %island1#1 : tensor<*xi32>, tensor<*xi32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Aug 02 02:26:39 UTC 2023 - 96.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/convert_control_to_data_outputs.mlir
%one:2 = tf_executor.island wraps "tf.Const"() { value = dense<1> : tensor<i32> } : () -> tensor<i32> %add2:2 = tf_executor.island wraps "tf.Add"(%arg0, %one#0) : (tensor<i32>, tensor<i32>) -> tensor<i32> tf_executor.fetch %add2#0, %arg1, %stack_push2#1 : tensor<i32>, tensor<f32>, !tf_executor.control } func.return %graph#0, %graph#1 : tensor<i32>, tensor<f32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Feb 22 18:35:00 UTC 2024 - 68.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/python/integration_test/quantize_model_test_base.py
activation_fn: The activation function to be used. No activation function if None. use_biasadd: If True, use BiasAdd for adding bias, else use AddV2. """ self.bias_size = bias_size self.activation_fn = activation_fn self.use_biasadd = use_biasadd self.filters = np.random.uniform(low=-1.0, high=1.0, size=weight_shape)
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Mar 21 08:51:46 UTC 2024 - 51.2K bytes - Viewed (0) -
src/cmd/compile/internal/ppc64/ssa.go
ssa.OpPPC64LoweredAtomicAdd64: // LWSYNC // LDAR/LWAR (Rarg0), Rout // ADD Rarg1, Rout // STDCCC/STWCCC Rout, (Rarg0) // BNE -3(PC) // MOVW Rout,Rout (if Add32) ld := ppc64.ALDAR st := ppc64.ASTDCCC if v.Op == ssa.OpPPC64LoweredAtomicAdd32 { ld = ppc64.ALWAR st = ppc64.ASTWCCC } r0 := v.Args[0].Reg() r1 := v.Args[1].Reg() out := v.Reg0()
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 55.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64.rules
// GOPPC64 values indicate power8, power9, etc. // That means the code is compiled for that target, // and will not run on earlier targets. // (Add(Ptr|64|32|16|8) ...) => (ADD ...) (Add64F ...) => (FADD ...) (Add32F ...) => (FADDS ...) (Sub(Ptr|64|32|16|8) ...) => (SUB ...) (Sub32F ...) => (FSUBS ...) (Sub64F ...) => (FSUB ...) (Min(32|64)F x y) && buildcfg.GOPPC64 >= 9 => (XSMINJDP x y)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 53.2K bytes - Viewed (0)