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Results 41 - 50 of 93 for 5xi32 (0.05 sec)
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tensorflow/compiler/mlir/lite/experimental/tac/tests/fold-constants-to-subgraph.mlir
%0 = "tfl.pseudo_const"() {value = dense<0> : tensor<3xi32>} : () -> tensor<3xi32> %1 = "tfl.pseudo_const"() {value = dense<[1, 384, 32]> : tensor<3xi32>} : () -> tensor<3xi32> %2 = func.call @simple_test(%arg0, %0, %1) {tac.interface_name = "func1"} : (tensor<4x384x32xf32>, tensor<3xi32>, tensor<3xi32>) -> tensor<1x384x32xf32> func.return %2 : tensor<1x384x32xf32> } // PARTIAL-LABEL: @simple_test
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 10.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/quantize-dynamic-range.mlir
func.func @QuantizeTransposeConvWeightOnly(%arg0: tensor<32x4x4x128xf32>, %arg1: tensor<4xi32>) -> tensor<1x32x42x128xf32> { %w = arith.constant dense<127.0> : tensor<1x32x42x128xf32> %b = arith.constant dense<0.0> : tensor<1x32x42x128xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 23 21:09:00 UTC 2024 - 23.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tf_executor_ops_invalid.mlir
func.func @invalid_merge(%arg0: tensor<*xi32>, %arg1: i32) -> tensor<*xi32> { %result = tf_executor.graph { %value, %idx, %ctlMerge = "tf_executor.Merge"(%arg0, %arg1) : (tensor<*xi32>, i32) -> (tensor<*xi32>, tensor<i32>, !tf_executor.control) // expected-error@-1 {{'tf_executor.Merge' op expects data operands to have tensor type but got 'i32'}} tf_executor.fetch %value : tensor<*xi32> } func.return %result : tensor<*xi32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Oct 19 01:12:10 UTC 2023 - 28.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tpu_sharding_identification.mlir
%0 = "tf.XlaSharding"(%arg0) { _XlaSharding = "\01\02\03"} : (tensor<*xi32>) -> tensor<*xi32> %1 = "tf.XlaSharding"(%arg1) { _XlaSharding = "\04\05\06"} : (tensor<*xi32>) -> tensor<*xi32> // flip order %2 = "tf.A"(%1) : (tensor<*xi32>) -> (tensor<*xi32>) %3 = "tf.B"(%0) : (tensor<*xi32>) -> (tensor<*xi32>) func.return %2, %3 : tensor<*xi32>, tensor<*xi32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Feb 20 19:07:52 UTC 2024 - 47.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/embedding_program_key.mlir
%2 = "tf.OpC"(%1) {} : (tensor<2xi32>) -> (tensor<2xi32>) %3 = "tf.OpB"(%cst_0, %2) { mini_batch_in_csr = ""} : (tensor<1x!tf_type.string>, tensor<2xi32>) -> (tensor<2xi32>) %4 = "tf.OpD"(%3) {} : (tensor<2xi32>) -> (tensor<2xi32>) tf_device.return %4 : tensor<2xi32> }) {device = "/job:localhost/replica:0/task:0/device:CPU:0"} : () -> (tensor<2xi32>) %0:2 = "tf_device.launch"() ({
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Oct 10 14:28:22 UTC 2023 - 16.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/replicate_invariant_op_hoisting.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Oct 31 08:59:10 UTC 2023 - 11.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_to_uniform_attribute_utils_test.cc
%1 = "tf.Const"() {value = dense<1.0> : tensor<2xf32>} : () -> tensor<2xf32> %2 = "tf.Const"() {value = dense<2> : tensor<2xi32>} : () -> tensor<2xi32> %3 = "tf.Const"() {value = dense<1.0> : tensor<2xf32>} : () -> tensor<2xf32> %4 = "tf.Const"() {value = dense<0> : tensor<2xi32>} : () -> tensor<2xi32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Sep 11 00:47:05 UTC 2023 - 11.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tf_device_ops_invalid.mlir
"tf_device.replicate" (%arg0, %arg0, %arg0, %arg0) ({ // expected-error@-1 {{'tf_device.replicate' op expects number of replicated inputs (4) to be evenly divisible by 'n' (3)}} ^entry(%input0: tensor<*xi32>, %input1: tensor<*xi32>): tf_device.return }) {n = 3 : i32, operandSegmentSizes = array<i32: 4, 0>} : (tensor<*xi32>, tensor<*xi32>, tensor<*xi32>, tensor<*xi32>) -> () } // -----
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Aug 14 15:35:49 UTC 2023 - 9.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/host_runtime/runtime_passes.td
```mlir func @tf_tpu_rewrite(%arg0: tensor<8xi32>) -> tensor<8xi32> { %0 = "tf_device.cluster_func"(%arg0) {_xla_compile_device_type = "TPU", _replication_info = "cluster0", func = @func, num_cores_per_replica = 2, input_sharding_configuration = ["\08\01\1A\01\01\22\01\00"], output_sharding_configuration = ["\08\01\1A\01\01\22\01\00"]} : (tensor<8xi32>) -> tensor<8xi32> return %0 : tensor<8xi32> } ``` will be rewritten as:
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Jan 10 18:58:57 UTC 2024 - 10.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/quantize_composite_functions.mlir
// CHECK-SAME: %[[b_scale]], %[[w_zp]], %[[out_scale]], %[[out_zp]]) // CHECK-SAME: f = @quantized_conv2d_with_bias_and_relu6_fn_0 // CHECK-SAME: (tensor<1x2x2x3xi8>, tensor<2x2x3x2xi8>, tensor<2xi32>, tensor<f32>, tensor<i32>, tensor<2xf32>, tensor<2xi32>, tensor<2xf32>, tensor<2xi32>, tensor<f32>, tensor<i32>) -> tensor<*xi8> // CHECK: %[[dequantize:.*]] = "tf.PartitionedCall"(%[[conv_quant]], %[[out_scale]], %[[out_zp]]) // CHECK-SAME: f = @dequantize_i8
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Nov 06 01:23:21 UTC 2023 - 15.2K bytes - Viewed (0)