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Results 11 - 20 of 43 for conv2 (0.04 sec)
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tensorflow/compiler/mlir/quantization/tensorflow/tests/fake_quant_e2e_xla.mlir
return %3 : tensor<?x?x?x2xf32> } // CHECK-LABEL: func @conv_with_dynamic_shape // The Conv2D should not be quantized since it has dynamic channel. // CHECK: "tf.Conv2D" // CHECK-SAME: (tensor<?x?x?x?xf32>, tensor<2x3x3x2xf32>) -> tensor<?x?x?x2xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 7.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_to_nchw.mlir
// CHECK: %[[ARG_PERM:.*]] = "tf.Const"() <{value = dense<[0, 3, 1, 2]> : tensor<4xi64>}> // CHECK: %[[ARG_TRANSPOSE:[0-9]*]] = "tf.Transpose"(%arg0, %[[ARG_PERM]]) // CHECK: %[[CONV2D:[0-9]*]] = "tf.Conv2D"(%[[ARG_TRANSPOSE]], %arg1) // CHECK-SAME: data_format = "NCHW" // CHECK-SAME: dilations = [1, 4, 2, 3] // CHECK-SAME: explicit_paddings = [1, 2, 7, 8, 3, 4, 5, 6] // CHECK-SAME: padding = "EXPLICIT"
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 9K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/legalize-tfl-stablehlo-conv.mlir
Michael Levesque-Dion <******@****.***> 1706075999 -0800
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Jan 24 06:08:43 UTC 2024 - 1.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/layout_optimization_layout_assignment_to_nhwc.mlir
// CHECK: %[[ARG_PERM:.*]] = "tf.Const"() <{value = dense<[0, 2, 3, 1]> : tensor<4xi64>}> // CHECK: %[[ARG_TRANSPOSE:[0-9]*]] = "tf.Transpose"(%arg0, %[[ARG_PERM]]) // CHECK: %[[CONV2D:[0-9]*]] = "tf.Conv2D"(%[[ARG_TRANSPOSE]], %arg1) // CHECK-SAME: data_format = "NHWC" // CHECK-SAME: dilations = [1, 3, 4, 2] // CHECK-SAME: explicit_paddings = [1, 2, 5, 6, 7, 8, 3, 4] // CHECK-SAME: padding = "EXPLICIT"
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 4.5K bytes - Viewed (0) -
platforms/software/dependency-management/src/main/java/org/gradle/internal/component/external/model/ivy/IvyConfigurationHelper.java
Registered: Wed Jun 12 18:38:38 UTC 2024 - Last Modified: Tue Mar 19 19:13:04 UTC 2024 - 5.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/lift_quantizable_spots_as_functions_xla.mlir
// ----- func.func @conv_with_non_constant_filter(%arg0: tensor<1x3x4x3xf32>, %arg1: tensor<2x3x3x2xf32>) -> tensor<*xf32> { %cst = "tf.Const"() {value = dense<0.000000e+00> : tensor<2xf32>} : () -> tensor<2xf32> %0 = "tf.Conv2D"(%arg0, %arg1) {data_format = "NHWC", dilations = [1, 1, 2, 1], explicit_paddings = [], padding = "SAME", strides = [1, 1, 2, 1], use_cudnn_on_gpu = true} : (tensor<1x3x4x3xf32>, tensor<2x3x3x2xf32>) -> tensor<*xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 8.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/prepare_quantize_drq_per_channel.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 6.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/prepare_quantize_drq.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 6.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/insert_quantized_functions.mlir
// CHECK-NOT: func private @internal_conv2d_fn // CHECK-NOT: func private @internal_matmul_fn // CHECK: func private @quantized_conv2d_with_bias_fn // CHECK-SAME: tf_quant.quantized_ops = ["Conv2D", "BiasAdd"] // CHECK: func private @quantized_conv2d_with_bias_and_relu_fn // CHECK: func private @quantized_conv2d_with_bias_and_relu6_fn // CHECK: func private @quantized_conv2d_fn
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Aug 29 01:13:58 UTC 2023 - 3.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/fuse_mhlo_convolution.mlir
// CHECK: %[[CONV:.+]] = mhlo.convolution(%[[INPUT]], %[[NEW_FILTER]]) dim_numbers = [b, 0, 1, f]x[0, 1, i, o]->[b, 0, 1, f], window = {stride = [1, 1], pad = {{\[\[}}0, 0], [0, 0]], rhs_dilate = [1, 1]} {batch_group_count = 1 : i64, feature_group_count = 1 : i64} : (tensor<?x256x256x3xf32>, tensor<1x1x3x2xf32>) -> tensor<?x256x256x2xf32> // CHECK: %[[SHAPE:.+]] = shape.shape_of %[[CONV]] : tensor<?x256x256x2xf32> -> tensor<4xindex>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Apr 06 15:32:52 UTC 2024 - 4.4K bytes - Viewed (0)