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Results 81 - 90 of 546 for putint (0.22 sec)
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src/cmd/compile/internal/ssa/_gen/ARMOps.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 24 00:21:13 UTC 2023 - 41K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteMIPS.go
v7 := b.NewValue0(v.Pos, OpMIPSXORconst, typ.UInt32) v7.AuxInt = int32ToAuxInt(3) v7.AddArg(ptr) v6.AddArg(v7) v5.AddArg(v6) v3.AddArg2(v4, v5) v8 := b.NewValue0(v.Pos, OpMIPSNORconst, typ.UInt32) v8.AuxInt = int32ToAuxInt(0) v9 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32) v10 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32) v10.AuxInt = int32ToAuxInt(0xff) v9.AddArg2(v10, v5)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 14:43:03 UTC 2023 - 176.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/utils/tf_to_uniform_attribute_utils_test.cc
ASSERT_EQ(-2147483648, op.getLhsQuantizationMinValAttr().getInt()); ASSERT_EQ(2147483647, op.getRhsQuantizationMaxValAttr().getInt()); ASSERT_EQ(-2147483648, op.getRhsQuantizationMinValAttr().getInt()); ASSERT_EQ(2147483647, op.getOutputQuantizationMaxValAttr().getInt()); ASSERT_EQ(-2147483648, op.getOutputQuantizationMinValAttr().getInt());
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Sep 11 00:47:05 UTC 2023 - 11.4K bytes - Viewed (0) -
src/main/java/jcifs/config/PropertyConfiguration.java
this.flags2 = Config.getInt(p, "jcifs.smb.client.flags2", 0); this.capabilities = Config.getInt(p, "jcifs.smb.client.capabilities", 0); this.sessionLimit = Config.getInt(p, "jcifs.smb.client.ssnLimit", SmbConstants.DEFAULT_SSN_LIMIT); this.maxRequestRetries = Config.getInt(p, "jcifs.smb.client.maxRequestRetries", 2);
Registered: Wed Jun 12 15:45:55 UTC 2024 - Last Modified: Thu Jan 05 13:06:39 UTC 2023 - 8.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteRISCV64latelower.go
// result: (SRLI [56-c] (SLLI <typ.UInt64> [56] x)) for { c := auxIntToInt64(v.AuxInt) if v_0.Op != OpRISCV64MOVBUreg { break } x := v_0.Args[0] if !(c <= 56) { break } v.reset(OpRISCV64SRLI) v.AuxInt = int64ToAuxInt(56 - c) v0 := b.NewValue0(v.Pos, OpRISCV64SLLI, typ.UInt64) v0.AuxInt = int64ToAuxInt(56) v0.AddArg(x) v.AddArg(v0) return true }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Jan 19 22:42:34 UTC 2023 - 5.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM64.go
x := v_0.Args[0] v.reset(OpARM64ADDconst) v.AuxInt = int64ToAuxInt(c + d) v.AddArg(x) return true } // match: (ADDconst [c] (SUBconst [d] x)) // result: (ADDconst [c-d] x) for { c := auxIntToInt64(v.AuxInt) if v_0.Op != OpARM64SUBconst { break } d := auxIntToInt64(v_0.AuxInt) x := v_0.Args[0] v.reset(OpARM64ADDconst)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 608.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewrite386splitload.go
// result: (CMPBconst (MOVBload {sym} [vo.Off()] ptr mem) [vo.Val8()]) for { vo := auxIntToValAndOff(v.AuxInt) sym := auxToSym(v.Aux) ptr := v_0 mem := v_1 v.reset(Op386CMPBconst) v.AuxInt = int8ToAuxInt(vo.Val8()) v0 := b.NewValue0(v.Pos, Op386MOVBload, typ.UInt8) v0.AuxInt = int32ToAuxInt(vo.Off()) v0.Aux = symToAux(sym) v0.AddArg2(ptr, mem) v.AddArg(v0) return true } }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Jan 19 22:42:34 UTC 2023 - 4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteAMD64splitload.go
// result: (CMPBconst (MOVBload {sym} [vo.Off()] ptr mem) [vo.Val8()]) for { vo := auxIntToValAndOff(v.AuxInt) sym := auxToSym(v.Aux) ptr := v_0 mem := v_1 if !(vo.Val() != 0) { break } v.reset(OpAMD64CMPBconst) v.AuxInt = int8ToAuxInt(vo.Val8()) v0 := b.NewValue0(v.Pos, OpAMD64MOVBload, typ.UInt8) v0.AuxInt = int32ToAuxInt(vo.Off()) v0.Aux = symToAux(sym) v0.AddArg2(ptr, mem) v.AddArg(v0)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Jan 19 22:42:34 UTC 2023 - 21.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewrite386.go
for { c := auxIntToInt32(v.AuxInt) if v_0.Op != Op386ANDLconst { break } d := auxIntToInt32(v_0.AuxInt) x := v_0.Args[0] v.reset(Op386ANDLconst) v.AuxInt = int32ToAuxInt(c & d) v.AddArg(x) return true } // match: (ANDLconst [c] _) // cond: c==0 // result: (MOVLconst [0]) for { c := auxIntToInt32(v.AuxInt) if !(c == 0) { break }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 21:05:46 UTC 2023 - 262.4K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/sync/PATENTS
order or agree to the institution of patent litigation against any entity (including a cross-claim or counterclaim in a lawsuit) alleging that this implementation of Go or any code incorporated within this implementation of Go constitutes direct or contributory patent infringement, or inducement of patent infringement, then any patent rights granted to you under this License for this implementation of Go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Sep 24 21:38:56 UTC 2021 - 1.3K bytes - Viewed (0)