// CHECK-SAME: Tin = []
      // CHECK-SAME: Tout = [f32]
      %outputs_2, %control_2 = tf_executor.island wraps "tf.BatchFunction"(%outputs_1) {batch_timeout_micros = 5000 : i64, batching_queue = "", container = "", f = @batched_func, max_batch_size = 256 : i64, num_batch_threads = 2 : i64, operandSegmentSizes = array<i32: 0, 1>, shared_name = ""} : (tensor<*x!tf_type.resource>) -> tensor<*xf32>
      tf_executor.fetch %outputs_2 : tensor<*xf32>
    }

  // CHECK-DAG: %[[LE1:.*]] = "tf.Less"(%[[NUM_UPPER]], %[[ZERO]]) : (tensor<i64>, tensor<i64>) -> tensor<i1>
  // CHECK-DAG: %[[NUM_UPPER_OR_N:.*]] = "tf.SelectV2"(%[[LE1]], %[[N]], %[[NUM_UPPER]]) : (tensor<i1>, tensor<i64>, tensor<i64>) -> tensor<i64>
  // CHECK-DAG: %[[LE2:.*]] = "tf.LessEqual"(%[[OFFSET]], %[[NUM_LOWER_OR_M]]) : (tensor<4x5xi64>, tensor<i64>) -> tensor<4x5xi1>

    %outputs_5, %control_6 = tf_executor.island(%control_4) wraps "tf.TPUCompilationResult"()...

  }) {device = "/device:CPU:0"} : () -> (tensor<!tf_type.string>, tensor<2x!tf_type.string>)
  // CHECK-DAG: %[[LAYOUT0:.*]] = "tf.TPUGetLayoutOp"(%[[COMPILE]]#1) <{index = 0 : i64, is_output = false}>
  // CHECK-DAG: %[[LAYOUT1:.*]] = "tf.TPUGetLayoutOp"(%[[COMPILE]]#1) <{index = 1 : i64, is_output = false}>
  // CHECK: %[[ITER:.*]]:2 = "tf.IteratorGetNext"
  %2:2 = "tf.IteratorGetNext"(%arg0) {device = "/device:CPU:0"}

        tf_device.return %2 : tensor<i64>
      }
      tf_executor.yield %1#0, %1#1 : tensor<i64>, tensor<i64>
    }
    tf_executor.fetch
  }
  func.return
}

// CHECK:      tf_executor.island
// CHECK:      [[CONST_0:%.+]] = "tf.Const"
// CHECK-SAME: value = dense<1> : tensor<i64>
// CHECK:      tf_executor.yield [[CONST_0]]

  %result = tf_executor.graph {
    tf_executor.fetch %arg0 : tensor<*xf32> {attr3 = 32 : i64, tf_executor.attr_fetch = "some_value"}
  } {attr2 = 32 : i64, tf_executor.attr1 = "value1"}

// CHECK:      tf_executor.graph {
// CHECK-NEXT:    tf_executor.fetch %{{.*}} : tensor<*xf32> {attr3 = 32 : i64, tf_executor.attr_fetch = "some_value"}
// CHECK-NEXT: } {attr2 = 32 : i64, tf_executor.attr1 = "value1"}
  func.return %result : tensor<*xf32>
}

// CHECK:           %[[REDUCE:.*]] = "stablehlo.reduce_window"(%[[INPUT]], %[[PAD_VAL]])
// CHECK:               <{window_dimensions = array<i64: 1, 3, 3, 1>,
// CHECK:                 window_strides = array<i64: 1, 2, 2, 1>}> ({
// CHECK:           ^bb0(%[[ARG0:.*]]: tensor<f32>, %[[ARG1:.*]]: tensor<f32>):
// CHECK:             %[[MAX:.*]] = stablehlo.maximum %[[ARG0]], %[[ARG1]] : tensor<f32>

      %outputs_3, %control_4 = tf_executor.island wraps "tf.Placeholder"() {device = "", dtype = "tfdtype$DT_FLOAT",...

    %0 = stablehlo.convolution(%arg0, %arg1) dim_numbers = [b, 0, 1, f]x[0, 1, i, o]->[b, 0, 1, f], window = {pad = [[0, 1], [1, 1]]} {batch_group_count = 1 : i64, feature_group_count = 1 : i64} : (tensor<1x3x4x3xf32>, tensor<2x3x3x2xf32>) -> tensor<1x3x4x2xf32>
    return %0 : tensor<1x3x4x2xf32>
  }
  // CHECK: func private @composite_conv_fn
  // CHECK: %[[CONV:.+]] = stablehlo.convolution

      %axis = "tf.Const"() { value = dense<0> : tensor<i64> } : () -> tensor<i64>
      %1 = "tf.ConcatV2"(%arg0, %arg1, %axis) : (tensor<3x3x!tf_type.qint8>, tensor<3x3x!tf_type.qint8>, tensor<i64>) -> tensor<6x3x!tf_type.qint8>
      func.return %1 : tensor<6x3x!tf_type.qint8>
    }
  })";
  CreateModule(kMlirModuleStr);