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Results 71 - 80 of 173 for conv_3d (0.17 sec)

  1. tensorflow/compiler/mlir/lite/experimental/tac/tests/device-transform-gpu.mlir

    // -----
    
    func.func @ensureBiasForConv2d(%arg0: tensor<128x32x32x3xf32>, %arg1: tensor<32x1x1x3xf32>) -> tensor<128x32x32x32xf32> {
      %cst = "tfl.no_value"() {value = unit} : () -> none
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 15.6K bytes
    - Viewed (0)
  2. tensorflow/compiler/mlir/lite/tests/get-arithmetic-count.mlir

    ^bb0(%arg0: tensor<256x32x32x3xf32>, %arg1: tensor<16x3x3x3xf32>, %arg2: tensor<16xf32>):
      // CHECK: _arithmetic_count = 230686720 : i64
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Dec 14 04:58:17 UTC 2022
    - 7.7K bytes
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  3. tensorflow/compiler/mlir/quantization/tensorflow/tests/cast_bf16_ops_to_f32.mlir

      %cst = "tf.Const"() {device = "", value = dense_resource<__elided__> : tensor<2x3x3x2xbf16>} : () -> tensor<2x3x3x2xbf16>
      %0 = "tf.Cast"(%arg0) {Truncate = false, device = ""} : (tensor<1x3x4x3xf32>) -> tensor<1x3x4x3xbf16>
      %1 = "tf.Conv2D"(%0, %cst) {data_format = "NHWC", device = "", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "SAME", strides = [1, 1, 2, 1], use_cudnn_on_gpu = true} : (tensor<1x3x4x3xbf16>, tensor<2x3x3x2xbf16>) -> tensor<1x3x2x2xbf16>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 8.4K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/quantization/tensorflow/passes/replace_cast_hacks_with_tf_xla_ops.cc

      // Input: [N, H, W, C] for Conv2D or [N, D, H, W, C] for Conv3D.
      dnums.set_input_batch_dimension(0);
      dnums.set_input_feature_dimension(num_dims - 1);
      // Kernel: [K, K, I, O] for Conv2D or [K, K, K, I, O] for Conv3D.
      dnums.set_kernel_input_feature_dimension(num_dims - 2);
      dnums.set_kernel_output_feature_dimension(num_dims - 1);
      // Output: [N, H, W, C] for Conv2D or [N, D, H, W, C] for Conv3D.
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Apr 25 16:01:03 UTC 2024
    - 47.1K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/quantization/tensorflow/tests/lift_quantizable_spots_as_functions_xla.mlir

    // -----
    
    func.func @conv_with_non_constant_filter(%arg0: tensor<1x3x4x3xf32>, %arg1: tensor<2x3x3x2xf32>) -> tensor<*xf32> {
      %cst = "tf.Const"() {value = dense<0.000000e+00> : tensor<2xf32>} : () -> tensor<2xf32>
      %0 = "tf.Conv2D"(%arg0, %arg1) {data_format = "NHWC", dilations = [1, 1, 2, 1], explicit_paddings = [], padding = "SAME", strides = [1, 1, 2, 1], use_cudnn_on_gpu = true} : (tensor<1x3x4x3xf32>, tensor<2x3x3x2xf32>) -> tensor<*xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 8.3K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/quantization/tensorflow/tests/prepare_quantize_drq_per_channel.mlir

    // CHECK: return %0 : tensor<*xf32>
    }
    
    // -----
    
    module {
      func.func @conv2d(%arg0: tensor<1x3x4x512xf32>) -> (tensor<*xf32>) {
        %cst_0 = "tf.Const"() {value = dense<0.000000e+00> : tensor<2xf32>} : () -> tensor<2xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 6.8K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/lite/quantization/lite/quantize_model_test.cc

      const auto& subgraph = model_.subgraphs[0];
      auto conv_op = subgraph->operators[0].get();
      const int input_tensor_idx = 0;
      const int weights_tensor_idx = 1;
      const int bias_tensor_index = 2;
      const int output_tensor_idx = 0;
      const auto bias_tensor =
          subgraph->tensors[conv_op->inputs[bias_tensor_index]].get();
      const auto input_tensor =
          subgraph->tensors[conv_op->inputs[input_tensor_idx]].get();
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Jun 12 23:15:24 UTC 2024
    - 73.9K bytes
    - Viewed (0)
  8. test/typeparam/issue49027.dir/a.go

    }
    
    func Conv2(v interface{}) (string, bool) {
    	return conv2[string](v)
    }
    
    func conv2[T any](v interface{}) (T, bool) {
    	x, ok := v.(T)
    	return x, ok
    }
    
    func Conv3(v interface{}) string {
    	return conv3[string](v)
    }
    
    func conv3[T any](v interface{}) T {
    	switch v := v.(type) {
    	case T:
    		return v
    	default:
    		var z T
    		return z
    	}
    }
    
    type Mystring string
    
    func (Mystring) Foo() {
    }
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Oct 19 22:47:48 UTC 2021
    - 871 bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/tensorflow/tests/mlir2graphdef/fetch_feed_names.mlir

          %outputs_2, %control_3 = tf_executor.island(%control_1) wraps "tf.Const"() {value = dense<0.000000e+00> : tensor<5x5x32x16xf32>} : () -> tensor<5x5x32x16xf32>
          %outputs_4, %control_5 = tf_executor.island wraps "tf.Conv2D"(%outputs, %outputs_2) {data_format = "NHWC", device = "", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "VALID", strides = [1, 1, 1, 1], use_cudnn_on_gpu = true} : (tensor<*xf32>, tensor<5x5x32x16xf32>) -> tensor<*xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Mar 25 12:28:56 UTC 2022
    - 3K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/lite/quantization/tensorflow/tests/fallback_to_flex_ops_default.mlir

      %cst_0 = "tf.Const"() {value = dense<-1.000000e+00> : tensor<f32>} : () -> tensor<f32>
      %cst_1 = "tf.Const"() {value = dense<1.000000e+00> : tensor<f32>} : () -> tensor<f32>
      %0 = "tf.Conv2D"(%arg0, %cst) {data_format = "NHWC", dilations = [1, 1, 1, 1], explicit_paddings = [], padding = "SAME", strides = [1, 1, 1, 1]} : (tensor<1x3x4x3xf32>, tensor<1x1x3x2xf32>) -> tensor<1x3x4x2xf32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 02 09:41:17 UTC 2024
    - 13.4K bytes
    - Viewed (0)
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