return x*y - z
}

func FusedSub32_b(x, y, z float32) float32 {
	// arm64:"FMSUBS"
	// riscv64:"FNMSUBS\t"
	return z - x*y
}

func FusedAdd64(x, y, z float64) float64 {
	// s390x:"FMADD\t"
	// ppc64x:"FMADD\t"
	// arm64:"FMADDD"
	// riscv64:"FMADDD\t"
	return x*y + z
}

func FusedSub64_a(x, y, z float64) float64 {
	// s390x:"FMSUB\t"
	// ppc64x:"FMSUB\t"
	// riscv64:"FMSUBD\t"
	return x*y - z

	case ASUB:
		if p.From.Type != obj.TYPE_CONST {
			break
		}
		// Rewrite SUB $const,... into ADD $-const,...
		p.From.Offset = -p.From.Offset
		p.As = AADD
		// This is now an ADD opcode, try simplifying it below.
		fallthrough

	// Rewrite ADD/OR/XOR/ANDCC $const,... forms into ADDIS/ORIS/XORIS/ANDISCC
	case AADD:
		// Don't rewrite if this is not adding a constant value, or is not an int32

Morven Cao <******@****.***> 1600974481 +0800

Brian Avery <******@****.***> 1597180858 -0400

Jeremy L. Morris <******@****.***> 1717516806 -0400

my-git9 <******@****.***> 1708354813 +0800

Frank Budinsky <******@****.***> 1662658341 -0400

  name: header-http-echo
spec:
  parentRefs:
    - name: acme-gw
  rules:
    - matches:
        - path:
            type: PathPrefix
            value: /add-a-request-header
      filters:
        - type: RequestHeaderModifier
          requestHeaderModifier:
            add:
              - name: my-header-name
                value: my-header-value
      backendRefs:
        - name: echo

  %0 = "tfl.custom"(%arg0, %arg0) {custom_code = "stablehlo.add", custom_option = #tfl<const_bytes : "0x00000100002401">} : (tensor<2xi32>, tensor<2xi32>) -> tensor<2xi32>
  func.return %0 : tensor<2xi32>
}
}

// CHECK:       module {
// CHECK-NEXT:  func @main(%arg0: tensor<2xi32>) -> tensor<2xi32> attributes {tf.entry_function = {inputs = "arg0", outputs = "tfl.custom1"}} {
// CHECK-NEXT:    %0 = stablehlo.add %arg0, %arg0 : tensor<2xi32>

	BYTE	$0x14
	RISBGN	$0, $31, $32, R4, R2
	SUBW	$0x100000, R1
	SRAW	$8, R1, R1
	ORW	$0x45000000, R1
	BR	L6
L2:
	MOVD	$0x30000000, R2
	CMPW	R1, R2
	BGT	L16
	FMOVD	200(R9), F2
	FMADD	F2, F0, F0
L1:
	FMOVD	F0, ret+8(FP)
	RET
L14:
	LTDBR	F0, F0
	BLTU	L17
	FMOVD	F0, F10
L4:
	FMOVD	192(R9), F2
	WFMADB	V0, V0, V2, V0
	LTDBR	F0, F0
	FSQRT	F0, F8
L5: