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Results 41 - 50 of 589 for iword (0.12 sec)
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src/runtime/asm_ppc64x.h
// is not needed. #ifdef GOOS_linux #ifdef GOARCH_ppc64 #define GO_PPC64X_HAS_FUNCDESC #define DEFINE_PPC64X_FUNCDESC(funcname, localfuncname) \ TEXT funcname(SB),NOSPLIT|NOFRAME,$0 \ DWORD $localfuncname(SB) \ DWORD $0 \ DWORD $0 #endif
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 18 22:20:51 UTC 2023 - 1.9K bytes - Viewed (0) -
src/math/acos_s390x.s
WFMADB V10, V8, V4, V8 FMADD F0, F8, F10 WFSDB V10, V1, V10 L1: FMOVD F10, ret+8(FP) RET L2: WORD $0xC0293FEF //iilf %r2,1072693247 BYTE $0xFF BYTE $0xFF CMPW R1, R2 BLE L12 L4: WORD $0xED009020 //cdb %f0,.L34-.L13(%r9) BYTE $0x00 BYTE $0x19 BEQ L8 WORD $0xED009018 //cdb %f0,.L35-.L13(%r9) BYTE $0x00 BYTE $0x19 BEQ L9 WFCEDBS V10, V10, V0 BVS L1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Aug 20 17:42:08 UTC 2018 - 3.7K bytes - Viewed (0) -
src/internal/goarch/goarch.go
// On PowerPC it is larger, to cover three more reserved words: // the compiler word, the link editor word, and the TOC save word. const MinFrameSize = _MinFrameSize // StackAlign is the required alignment of the SP register. // The stack must be at least word aligned, but some architectures require more.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue May 17 19:48:21 UTC 2022 - 2.1K bytes - Viewed (0) -
src/math/cbrt_s390x.s
TEXT ·cbrtAsm(SB), NOSPLIT, $0-16 FMOVD x+0(FP), F0 MOVD $·cbrtrodataL9<>+0(SB), R9 LGDR F0, R2 WORD $0xC039000F //iilf %r3,1048575 BYTE $0xFF BYTE $0xFF SRAD $32, R2 WORD $0xB9170012 //llgtr %r1,%r2 MOVW R1, R6 MOVW R3, R7 CMPBLE R6, R7, L2 WORD $0xC0397FEF //iilf %r3,2146435071 BYTE $0xFF BYTE $0xFF MOVW R3, R7 CMPBLE R6, R7, L8 L1: FMOVD F0, ret+8(FP) RET
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 15:34:41 UTC 2019 - 4.9K bytes - Viewed (0) -
tensorflow/compiler/jit/device_util.h
word_index++) { uint64 word = storage_[word_index]; while (word != 0) { uint64 only_lowest_bit_set = word & -word; // The number of trailing zeros in a non-zero word is the index of the // least significant 1. int bit_index = absl::countr_zero(word); if (!func(DeviceId(word_index * kWordSize + bit_index))) { return;
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 15 17:18:31 UTC 2024 - 7.1K bytes - Viewed (0) -
src/main/webapp/css/admin/style.css
font-size: 120%; font-weight: 600; } section.content table { display: table; table-layout: fixed; width } section.content table td { display: table-cell; word-wrap: break-word; overflow-wrap: break-word; } section.content table .label { color: #fff; } textarea.systemInfoData { height: 22em; line-height: 1.5em; } .login-box { height: 500px;
Registered: Wed Jun 12 13:08:18 UTC 2024 - Last Modified: Thu Feb 13 07:47:04 UTC 2020 - 1.1K bytes - Viewed (0) -
src/runtime/internal/sys/consts.go
// On PowerPC it is larger, to cover three more reserved words: // the compiler word, the link editor word, and the TOC save word. const MinFrameSize = goarch.MinFrameSize // StackAlign is the required alignment of the SP register. // The stack must be at least word aligned, but some architectures require more.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Nov 18 16:26:25 UTC 2022 - 1.4K bytes - Viewed (0) -
src/math/cosh_s390x.s
MOVD $coshtab<>+0(SB), R5 WFMADB V4, V6, V1, V3 RISBGZ $57, $60, $3, R1, R4 WFMSDB V4, V6, V1, V6 WORD $0x68145000 //ld %f1,0(%r4,%r5) WFMSDB V4, V1, V0, V2 WORD $0xA7487FBE //lhi %r4,32702 FMADD F3, F2, F1 SUBW R1, R4 RISBGZ $57, $60, $3, R4, R12 WORD $0x682C5000 //ld %f2,0(%r12,%r5) FMSUB F2, F4, F0 RISBGN $0, $15, $48, R1, R2 WFMADB V0, V6, V2, V6
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 15:34:41 UTC 2019 - 5.6K bytes - Viewed (0) -
src/math/expm1_s390x.s
RISBGZ $57, $60, $3, R1, R3 WORD $0xB3130022 //lcdbr %f2,%f2 MOVD $·expm1tab<>+0(SB), R2 WORD $0x68432000 //ld %f4,0(%r3,%r2) FMADD F4, F0, F0 SLD $48, R1, R2 WFMSDB V2, V0, V4, V0 LDGR R2, F4 WORD $0xB3130000 //lcdbr %f0,%f0 FSUB F4, F6 WFMSDB V0, V4, V6, V0 FMOVD F0, ret+8(FP) RET L16: WFCEDBS V2, V2, V4 BVS LEXITTAGexpm1 WORD $0xED205008 //cdb %f2,.L34-.L22(%r5) BYTE $0x00
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 15:34:41 UTC 2019 - 5.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/flags_arm64_test.s
MOVD x+0(FP), R0 MOVD y+8(FP), R1 CMN R0, R1 WORD $0xd53b4200 // MOVD NZCV, R0 MOVD R0, ret+16(FP) RET TEXT ·asmSubFlags(SB),NOSPLIT,$0-24 MOVD x+0(FP), R0 MOVD y+8(FP), R1 CMP R1, R0 WORD $0xd53b4200 // MOVD NZCV, R0 MOVD R0, ret+16(FP) RET TEXT ·asmAndFlags(SB),NOSPLIT,$0-24 MOVD x+0(FP), R0 MOVD y+8(FP), R1 TST R1, R0 WORD $0xd53b4200 // MOVD NZCV, R0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 13 09:12:17 UTC 2021 - 699 bytes - Viewed (0)