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Results 41 - 50 of 2,114 for Xadd (0.17 sec)

  1. src/runtime/export_test.go

    	StackScanWork   int64
    	GlobalsScanWork int64
    }
    
    func (c *GCController) Revise(d GCControllerReviseDelta) {
    	c.heapLive.Add(d.HeapLive)
    	c.heapScan.Add(d.HeapScan)
    	c.heapScanWork.Add(d.HeapScanWork)
    	c.stackScanWork.Add(d.StackScanWork)
    	c.globalsScanWork.Add(d.GlobalsScanWork)
    	c.revise()
    }
    
    func (c *GCController) EndCycle(bytesMarked uint64, assistTime, elapsed int64, gomaxprocs int) {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 30 17:50:53 UTC 2024
    - 46.1K bytes
    - Viewed (0)
  2. src/cmd/vendor/golang.org/x/arch/x86/x86asm/tables.go

    	/*509*/ uint16(xSetOp), uint16(ADD),
    	/*511*/ uint16(xReadSlashR),
    	/*512*/ uint16(xArgRM32),
    	/*513*/ uint16(xArgR32),
    	/*514*/ uint16(xMatch),
    	/*515*/ uint16(xCondDataSize), 503, 509, 519,
    	/*519*/ uint16(xSetOp), uint16(ADD),
    	/*521*/ uint16(xReadSlashR),
    	/*522*/ uint16(xArgRM64),
    	/*523*/ uint16(xArgR64),
    	/*524*/ uint16(xMatch),
    	/*525*/ uint16(xSetOp), uint16(ADD),
    	/*527*/ uint16(xReadSlashR),
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 16 22:24:28 UTC 2022
    - 266.8K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssagen/ssa.go

    }
    
    var opToSSA = map[opAndType]ssa.Op{
    	{ir.OADD, types.TINT8}:    ssa.OpAdd8,
    	{ir.OADD, types.TUINT8}:   ssa.OpAdd8,
    	{ir.OADD, types.TINT16}:   ssa.OpAdd16,
    	{ir.OADD, types.TUINT16}:  ssa.OpAdd16,
    	{ir.OADD, types.TINT32}:   ssa.OpAdd32,
    	{ir.OADD, types.TUINT32}:  ssa.OpAdd32,
    	{ir.OADD, types.TINT64}:   ssa.OpAdd64,
    	{ir.OADD, types.TUINT64}:  ssa.OpAdd64,
    	{ir.OADD, types.TFLOAT32}: ssa.OpAdd32F,
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Jun 10 19:44:43 UTC 2024
    - 284.9K bytes
    - Viewed (0)
  4. src/cmd/vendor/golang.org/x/arch/x86/x86asm/decode.go

    	if lockIndex >= 0 && inst.Prefix[lockIndex]&PrefixImplicit == 0 {
    		switch inst.Op {
    		// TODO(rsc): Perhaps this instruction class should be derived from the CSV.
    		case ADD, ADC, AND, BTC, BTR, BTS, CMPXCHG, CMPXCHG8B, CMPXCHG16B, DEC, INC, NEG, NOT, OR, SBB, SUB, XOR, XADD, XCHG:
    			if isMem(inst.Args[0]) {
    				hasLock = true
    				break
    			}
    			fallthrough
    		default:
    			inst.Prefix[lockIndex] |= PrefixInvalid
    		}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Feb 10 18:59:52 UTC 2023
    - 45.1K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/tensorflow/tests/graphdef2mlir/add.pbtxt

    # NONE:           %[[add:.*]], %[[add_control:.*]] = tf_executor.island wraps "tf.Add"(%[[ARG_0]], %[[ARG_1]])
    # NONE:           fetch %[[add]]
    
    # UNKNOWN-LABEL: func @main
    # UNKNOWN-SAME:  (%[[ARG_0:[a-z0-9]+]]: tensor<*xi32>, %[[ARG_1:[a-z0-9]+]]: tensor<*xi32>) -> tensor<*xi32>
    # UNKNOWN-SAME:  control_outputs = ""
    # UNKNOWN-SAME:  inputs = "input0,input1"
    # UNKNOWN-SAME:  outputs = "Add"
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Nov 17 08:38:39 UTC 2020
    - 3.4K bytes
    - Viewed (0)
  6. tensorflow/compiler/mlir/tensorflow/tests/compile_mlir_util/add.mlir

    // CHECK-NEXT:    %[[ARG0]] = f32[] parameter(0)
    // CHECK-NEXT:    %[[ARG1]] = f32[] parameter(1)
    // CHECK-NEXT:    [[ADD:%.*]] = f32[] add(f32[] %[[ARG0]], f32[] %[[ARG1]])
    // CHECK-NEXT:    ROOT %tuple.{{[0-9]+}} = (f32[]) tuple(f32[] [[ADD]])
    // CHECK-NEXT:  }
    
    // CHECK:       // InputMapping {0, 1}
    // CHECK-NEXT:  // XlaInputShape f32[]
    // CHECK-NEXT:  // XlaInputShape f32[]
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Mar 23 18:56:13 UTC 2022
    - 2.7K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/lite/tests/end2end/add.pbtxt

    # RUN: tf_tfl_translate -tf-input-arrays=input0,input1 -tf-input-shapes=4:4 -tf-input-data-types=DT_INT32,DT_INT32 -tf-output-arrays=Add %s -o - | flatbuffer_to_string - | FileCheck %s
    
    # Add two tensor<4xi32> inputs and return the result
    
    node {
      name: "Add"
      op: "Add"
      input: "input0"
      input: "input1"
      attr {
        key: "T"
        value {
          type: DT_INT32
        }
      }
    }
    node {
      name: "input0"
      op: "Placeholder"
      attr {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jul 14 16:41:28 UTC 2022
    - 2.4K bytes
    - Viewed (0)
  8. src/crypto/sha1/sha1block_arm64.s

    	VADD	V18.S4, V4.S4, V16.S4
    	HASHUPDATEPARITY
    
    	VADD	V18.S4, V5.S4, V16.S4
    	HASHUPDATEPARITY
    
    	VADD	V18.S4, V6.S4, V16.S4
    	HASHUPDATEPARITY
    
    	VADD	V18.S4, V7.S4, V16.S4
    	HASHUPDATEPARITY
    
    	SUB	$64, R3, R3                                  // message length - 64bytes, then compare with 64bytes
    	VADD	V2.S4, V0.S4, V0.S4
    	VADD	V1.S4, V20.S4, V20.S4
    	CBNZ	R3, blockloop
    
    sha1ret:
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 3.5K bytes
    - Viewed (0)
  9. src/vendor/golang.org/x/crypto/chacha20/chacha_arm64.s

    	WORD	$0x4D40E8DD
    
    	VADD	V20.S4, V4.S4, V4.S4
    	VADD	V21.S4, V5.S4, V5.S4
    	VADD	V22.S4, V6.S4, V6.S4
    	VADD	V23.S4, V7.S4, V7.S4
    	VADD	V24.S4, V8.S4, V8.S4
    	VADD	V25.S4, V9.S4, V9.S4
    	VADD	V26.S4, V10.S4, V10.S4
    	VADD	V27.S4, V11.S4, V11.S4
    	VADD	V28.S4, V12.S4, V12.S4
    	VADD	V29.S4, V13.S4, V13.S4
    	VADD	V30.S4, V14.S4, V14.S4
    	VADD	V31.S4, V15.S4, V15.S4
    
    	VZIP1	V1.S4, V0.S4, V16.S4
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:33 UTC 2023
    - 8K bytes
    - Viewed (0)
  10. src/crypto/sha512/sha512block_arm64.s

    	SHA512ROUND_LAST(V2, V3, V1, V4, V0, V25, V17)
    	SHA512ROUND_LAST(V4, V2, V0, V1, V3, V26, V18)
    	SHA512ROUND_LAST(V1, V4, V3, V0, V2, V27, V19)
    
    	// add result to digest
    	VADD	V0.D2, V8.D2, V8.D2
    	VADD	V1.D2, V9.D2, V9.D2
    	VADD	V2.D2, V10.D2, V10.D2
    	VADD	V3.D2, V11.D2, V11.D2
    	SUB	$128, R2
    	CBNZ	R2, loop
    
    	VST1	[V8.D2, V9.D2, V10.D2, V11.D2], (R0)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 5K bytes
    - Viewed (0)
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