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Results 41 - 50 of 395 for Cond (0.2 sec)
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test/codegen/condmove.go
func cmovinv(cond bool, a, b int) { var x0, x1 int if cond { x0 = a } else { x0 = ^b } // arm64:"CSINV\tNE", -"CSEL" r0 = x0 if cond { x1 = ^b } else { x1 = a } // arm64:"CSINV\tEQ", -"CSEL" r1 = x1 } func cmovneg(cond bool, a, b, c int) { var x0, x1 int if cond { x0 = a } else { x0 = -b } // arm64:"CSNEG\tNE", -"CSEL"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Oct 06 20:57:33 UTC 2023 - 6.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteRISCV64.go
case BlockRISCV64BEQ: // match: (BEQ (MOVDconst [0]) cond yes no) // result: (BEQZ cond yes no) for b.Controls[0].Op == OpRISCV64MOVDconst { v_0 := b.Controls[0] if auxIntToInt64(v_0.AuxInt) != 0 { break } cond := b.Controls[1] b.resetWithControl(BlockRISCV64BEQZ, cond) return true } // match: (BEQ cond (MOVDconst [0]) yes no) // result: (BEQZ cond yes no)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 205.1K bytes - Viewed (0) -
analysis/analysis-api/testData/components/dataFlowInfoProvider/exitPointSnapshot/controlFlow/breakContinue.kt
Registered: Wed Jun 12 09:53:16 UTC 2024 - Last Modified: Thu Mar 14 10:53:11 UTC 2024 - 266 bytes - Viewed (0) -
analysis/analysis-api/testData/components/dataFlowInfoProvider/exitPointSnapshot/controlFlow/breakReturn.kt
Registered: Wed Jun 12 09:53:16 UTC 2024 - Last Modified: Thu Mar 14 10:53:11 UTC 2024 - 264 bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/tests/tf_to_corert/reorder_assert.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Mar 25 10:51:48 UTC 2022 - 3.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM.go
v.AuxInt = int32ToAuxInt(0) return true } // match: (ANDconst [c] x) // cond: int32(c)==-1 // result: x for { c := auxIntToInt32(v.AuxInt) x := v_0 if !(int32(c) == -1) { break } v.copyOf(x) return true } // match: (ANDconst [c] x) // cond: !isARMImmRot(uint32(c)) && isARMImmRot(^uint32(c)) // result: (BICconst [int32(^uint32(c))] x) for {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 486.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/drop_while_shape_invariant.mlir
// IN-CLUSTER: shape_invariant %0 = "tf.While"(%arg0) {cond = @while_cond, body = @while_body, is_stateless = false, shape_invariant} : (tensor<4xf32>) -> (tensor<*xf32>) // IN-CLUSTER: shape_invariant %1 = "tf.WhileRegion"(%arg0) ({ ^cond(%carg0: tensor<*xf32>): %2 = "tf.Const"() {value = dense<true> : tensor<i1>} : () -> tensor<i1>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Mar 28 12:06:33 UTC 2022 - 2.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM64.go
} // match: (CMPWconst (MOVBUreg _) [c]) // cond: 0xff < c // result: (FlagConstant [subFlags64(0,1)]) for { c := auxIntToInt32(v.AuxInt) if v_0.Op != OpARM64MOVBUreg || !(0xff < c) { break } v.reset(OpARM64FlagConstant) v.AuxInt = flagConstantToAuxInt(subFlags64(0, 1)) return true } // match: (CMPWconst (MOVHUreg _) [c]) // cond: 0xffff < c
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 608.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/unranked_function_output.mlir
// CHECK: return %0 : tensor<*xf32> // CHECK: } func.func @main(%arg0: tensor<1xf32>) -> tensor<*xf32> { %0 = "tf.While"(%arg0) {cond = @cond, body = @body, is_stateless = false} : (tensor<1xf32>) -> tensor<*xf32> func.return %0 : tensor<*xf32> } func.func @cond(%arg1: tensor<*xf32>) -> tensor<*xf32> { func.return %arg1: tensor<*xf32> } func.func @body(%arg1: tensor<*xf32>) -> tensor<*xf32> {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 11 07:12:22 UTC 2022 - 1.3K bytes - Viewed (0) -
analysis/analysis-api/testData/components/dataFlowInfoProvider/exitPointSnapshot/controlFlow/continueReturn.kt
Registered: Wed Jun 12 09:53:16 UTC 2024 - Last Modified: Thu Mar 14 10:53:11 UTC 2024 - 267 bytes - Viewed (0)