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Results 31 - 40 of 615 for outp (0.06 sec)
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src/crypto/internal/nistec/fiat/p384_fiat64.go
out1[21] = x45 out1[22] = x47 out1[23] = x48 out1[24] = x49 out1[25] = x51 out1[26] = x53 out1[27] = x55 out1[28] = x57 out1[29] = x59 out1[30] = x61 out1[31] = x62 out1[32] = x63 out1[33] = x65 out1[34] = x67 out1[35] = x69 out1[36] = x71 out1[37] = x73 out1[38] = x75 out1[39] = x76 out1[40] = x77 out1[41] = x79 out1[42] = x81
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 05 21:53:03 UTC 2022 - 90.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback_sync.td
arg: the tensor to be set in the resource array. index: the index in the resource array }]; let arguments = (ins TFTensorType:$arg, I64Attr:$index ); let results = (outs); let assemblyFormat = "operands attr-dict"; } def SetResourceDhtOp : FallbackSync_Op<"set_resource_dht", [CoreRT_TypedAttributeTrait]> { let summary = "Set a DHT in resource array"; let description = [{
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Jun 07 21:12:01 UTC 2023 - 7.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/ir/tf_ops.td
}]; let arguments = (ins); let results = (outs Res<TF_Int32Tensor, [{A vector containing the global TPU id of each TPU on the host.}]>:$output ); } def TF_ShutdownTPUSystemOp : TF_Op<"ShutdownTPUSystem", []> { let summary = [{ An op that shuts down the TPU system. }]; let arguments = (ins); let results = (outs TF_BoolTensor:$success ); }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Apr 24 04:08:35 UTC 2024 - 90.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/ir/tfl_ops.td
); let results = (outs); } def TFL_HashtableSizeOp: TFL_Op<"hashtable_size", []> { let summary = "Computes the number of elements in the given table."; let arguments = (ins TFL_ResourceTensor:$hash_table ); let results = (outs TFL_I64Tensor:$out ); } def TFL_BroadcastArgsOp : TFL_Op<"broadcast_args",[
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Jun 06 19:09:08 UTC 2024 - 186K bytes - Viewed (0) -
android/guava/src/com/google/common/collect/RegularImmutableMap.java
continue entries; } } if (outI < i) { // if outI == i don't bother writing the values back where they came from alternatingKeysAndValues[outKeyIndex] = key; alternatingKeysAndValues[outKeyIndex ^ 1] = value; } outI++; } return outI == n ? hashTable : new Object[] {hashTable, outI, duplicateKey}; } else if (tableSize <= SHORT_MAX_SIZE) { /*
Registered: Wed Jun 12 16:38:11 UTC 2024 - Last Modified: Mon Apr 15 22:32:14 UTC 2024 - 22.7K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfrt/ir/tfrt_fallback_async.td
in_ch and out_ch are for control dependencies. }]; let arguments = (ins TFRT_ChainType:$in_ch, TFTensorType:$arg, StrAttr:$device, I64Attr:$index ); let results = (outs TFRT_ChainType:$out_ch ); let assemblyFormat = "operands attr-dict"; } def GetResourceOp : FallbackAsync_Op<"get_resource", [CoreRT_TypedAttributeTrait,
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 18 15:01:21 UTC 2024 - 15.8K bytes - Viewed (0) -
src/crypto/internal/nistec/fiat/p521_fiat64.go
out1[21] = x48 out1[22] = x50 out1[23] = x51 out1[24] = x52 out1[25] = x54 out1[26] = x56 out1[27] = x58 out1[28] = x60 out1[29] = x62 out1[30] = x64 out1[31] = x65 out1[32] = x66 out1[33] = x68 out1[34] = x70 out1[35] = x72 out1[36] = x74 out1[37] = x76 out1[38] = x78 out1[39] = x79 out1[40] = x80 out1[41] = x82 out1[42] = x84
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 05 21:53:03 UTC 2022 - 167K bytes - Viewed (0) -
src/cmd/link/internal/ld/macho_combine_dwarf.go
if _, err := outf.Seek(int64(dwarfCmdOffset), 0); err != nil { return err } if _, err := io.CopyN(outf, bytes.NewReader(realdwarf.Raw()), int64(realdwarf.Len)); err != nil { return err } if _, err := outf.Seek(int64(unsafe.Offsetof(exem.FileHeader.Ncmd)), 0); err != nil { return err } if err := binary.Write(outf, exem.ByteOrder, exem.Ncmd+1); err != nil { return err }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue May 21 18:45:27 UTC 2024 - 13.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/ir/tf_generated_ops.td
); let results = (outs TF_NumberTensor:$out ); TF_DerivedOperandTypeAttr T = TF_DerivedOperandTypeAttr<0>; TF_DerivedOperandTypeAttr Tidx = TF_DerivedOperandTypeAttr<1>; let hasVerifier = 1; } def TF_CumsumOp : TF_Op<"Cumsum", [Pure, TF_AllTypesMatch<["x", "out"]>]> {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 11 23:24:08 UTC 2024 - 793K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/post-quantize.mlir
// QDQ-NEXT: %[[out1:.*]] = "tfl.dequantize"(%[[split]]#0) : (tensor<2x!quant.uniform<u8:f32, 1.000000e+00>>) -> tensor<2xf32> // QDQ-NEXT: %[[out2:.*]] = "tfl.dequantize"(%[[split]]#1) : (tensor<2x!quant.uniform<u8:f32, 1.000000e+00>>) -> tensor<2xf32> // QDQ-NEXT: return %[[out1]], %[[out2]] : tensor<2xf32>, tensor<2xf32> } // CHECK-LABEL: RemoveTrival
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 19.9K bytes - Viewed (0)