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Results 31 - 40 of 570 for ARG1 (0.15 sec)
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src/runtime/libfuzzer.go
fakePC = fakePC % retSledSize libfuzzerCallTraceIntCmp(&__sanitizer_cov_trace_cmp4, uintptr(arg0), uintptr(arg1), uintptr(fakePC)) } //go:nosplit func libfuzzerTraceCmp8(arg0, arg1 uint64, fakePC uint) { fakePC = fakePC % retSledSize libfuzzerCallTraceIntCmp(&__sanitizer_cov_trace_cmp8, uintptr(arg0), uintptr(arg1), uintptr(fakePC)) } //go:nosplit
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Dec 23 01:12:02 UTC 2022 - 6.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/mark_input_output_aliases.mlir
// CHECK-LABEL: func @device_func_3 // CHECK-NOT: tf.aliasing_output func.func @device_func_3(%arg0: tensor<f32>, %arg1: tensor<f32>) -> (tensor<f32>, tensor<f32>) { func.return %arg1, %arg0 : tensor<f32>, tensor<f32> } // CHECK-LABEL: func @skip_multiple_reads_of_resource func.func @skip_multiple_reads_of_resource(%arg0: !tf_res_f32, %arg1: !tf_res_f32) { %0 = "tf.ReadVariableOp"(%arg0) : (!tf_res_f32) -> tensor<f32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Mar 05 04:14:26 UTC 2024 - 6.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/resource-device-inference.mlir
%id1 = "tf.Identity"(%arg1) : (!tf_res) -> !tf_res tf_executor.yield } tf_executor.fetch %island : !tf_executor.control } func.return } // CHECK-LABEL: func @ifregion_else // CHECK-SAME: (%arg0: {{.+}} {tf.device = "/TPU:0"}, %arg1: {{.+}} {tf.device = "/TPU:1"} func.func @ifregion_else( %arg0: !tf_res, %arg1: !tf_res) { tf_executor.graph {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 17 16:01:45 UTC 2022 - 18.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/if_op.mlir
func.return %1 : tensor<1xf32> } func.func @cond_true(%arg0: tensor<*xf32>, %arg1: tensor<*xf32>) -> tensor<*xf32> { %0 = tfl.add %arg0, %arg1 {fused_activation_function = "NONE"} : tensor<*xf32> func.return %0 : tensor<*xf32> } func.func @cond_false(%arg0: tensor<*xf32>, %arg1: tensor<*xf32>) -> tensor<*xf32> { %0 = tfl.mul %arg0, %arg1 {fused_activation_function = "NONE"} : tensor<*xf32> func.return %0 : tensor<*xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 1.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/xla_call_module_round_trip.mlir
// CHECK-LABEL: module module { // CHECK-LABEL: func @main // CHECK-SAME: %[[ARG0:.*]]: tensor<10xi32>, %[[ARG1:.*]]: tensor<10xi32> func.func @main(%arg0: tensor<10xi32>, %arg1: tensor<10xi32>) -> tensor<10xi32> { // CHECK: %[[RESULT:.*]] = "tf.XlaCallModule"(%[[ARG0]], %[[ARG1]]) // CHECK-SAME: Sout = [#tf_type.shape<?>] // CHECK-NOT: function_list // CHECK-SAME: module = ""
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Nov 02 18:38:51 UTC 2023 - 2.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/xla_rewrite.mlir
// CHECK: "tf.XlaLaunch"(%arg1, %arg0) <{function = @func_with_resources, operandSegmentSizes = array<i32: 0, 1, 1>}> : (tensor<i32>, tensor<!tf_type.resource>) -> tensor<i32> %0 = "tf_device.cluster_func"(%arg0, %arg1) {func = @func_with_resources} : (tensor<!tf_type.resource>, tensor<i32>) -> tensor<i32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 2.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/386Ops.go
{name: "DIVW", argLength: 2, reg: gp11div, asm: "IDIVW", aux: "Bool", clobberFlags: true}, // arg0 / arg1 {name: "DIVLU", argLength: 2, reg: gp11div, asm: "DIVL", clobberFlags: true}, // arg0 / arg1 {name: "DIVWU", argLength: 2, reg: gp11div, asm: "DIVW", clobberFlags: true}, // arg0 / arg1 {name: "MODL", argLength: 2, reg: gp11mod, asm: "IDIVL", aux: "Bool", clobberFlags: true}, // arg0 % arg1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 14 08:10:32 UTC 2023 - 45.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/legalize-tf.mlir
^bb0(%arg0: tensor<8x16xi16>, %arg1: tensor<8x16xi16>): %0 = "tf.FloorDiv"(%arg0, %arg1) : (tensor<8x16xi16>, tensor<8x16xi16>) -> tensor<8x16xi16> func.return %0 : tensor<8x16xi16> // CHECK-LABEL: floor_div_i16 // CHECK: tfl.floor_div %arg0, %arg1 : tensor<8x16xi16> // CHECK: return } func.func @not_equal(%arg0: tensor<8x16xf32>, %arg1: tensor<8x16xf32>) -> tensor<8x16xi1> {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Jun 05 01:54:33 UTC 2024 - 153.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/fused_kernel_matcher.mlir
// CHECK-LABEL: conv2DBiasAdd_noActivation func.func @conv2DBiasAdd_noActivation(%arg0: tensor<128xf32>, %arg1: tensor<1x1x3x128xf32>, %arg2: tensor<8x32x32x3xf32>) -> (tensor<*xf32>) {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 13.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/xla_call_module_deserialization.mlir
// CHECK: tf.StreamResults // StreamResults is a pseudo op in this test. "tf.StreamResults"(%arg0, %arg1) : (tensor<?xi32>, tensor<*xi32>) -> () func.return } // CHECK-LABEL: func @main // CHECK-SAME: %[[ARG0:.*]]: tensor<10xi32>, %[[ARG1:.*]]: tensor<10xi32> func.func @main(%arg0: tensor<10xi32>, %arg1: tensor<10xi32>) -> tensor<10xi32> {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Nov 02 18:38:51 UTC 2023 - 6.9K bytes - Viewed (0)