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Results 21 - 30 of 2,292 for nRules (0.21 sec)

  1. src/cmd/compile/internal/ssa/_gen/S390X.rules

    // be a power of 2 (because it is a single bit) or 0 (if the original value is 0).
    // In all of these rules we use a rightmost bit calculation to determine one operand
    // for the addition or subtraction. We then just need to calculate if the other
    // operand is a valid power of 2 before we can match the rule.
    //
    // Notes:
    //   - the generic rules have already matched single powers of two so we ignore them here
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 12 18:09:26 UTC 2023
    - 74.3K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/PPC64.rules

    //
    // Note, y is always non-negative.
    //
    // Note, ISELZ is intentionally not used in lower. Where possible, ISEL is converted to ISELZ in late lower
    // after all the ISEL folding rules have been exercised.
    
    ((Rsh64U|Lsh64)x64 <t> x y)  => (ISEL [0] (S(R|L)D <t> x y) (MOVDconst [0])        (CMPUconst y [64]))
    ((Rsh64U|Lsh64)x32 <t> x y)  => (ISEL [0] (S(R|L)D <t> x y) (MOVDconst [0])        (CMPWUconst y [64]))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 53.2K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/_gen/ARM64.rules

    // shifts
    // hardware instruction uses only the low 6 bits of the shift
    // we compare to 64 to ensure Go semantics for large shifts
    // Rules about rotates with non-const shift are based on the following rules,
    // if the following rules change, please also modify the rules based on them.
    
    // check shiftIsBounded first, if shift value is proved to be valid then we
    // can do the shift directly.
    // left shift
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 113.1K bytes
    - Viewed (0)
  4. testing/architecture-test/src/changes/archunit-store/stored.rules

    Anže Sodja <******@****.***> 1717576978 +0200
    Registered: Wed Jun 12 18:38:38 UTC 2024
    - Last Modified: Wed Jun 05 08:43:33 UTC 2024
    - 3.8K bytes
    - Viewed (0)
  5. staging/publishing/rules.yaml

    rules:
    - destination: apimachinery
      branches:
      - name: master
        source:
          branch: master
          dirs:
          - staging/src/k8s.io/apimachinery
      - name: release-1.27
        go: 1.21.11
        source:
          branch: release-1.27
          dirs:
          - staging/src/k8s.io/apimachinery
      - name: release-1.28
        go: 1.21.11
        source:
          branch: release-1.28
          dirs:
          - staging/src/k8s.io/apimachinery
    Registered: Sat Jun 15 01:39:40 UTC 2024
    - Last Modified: Wed Jun 12 09:33:40 UTC 2024
    - 57.6K bytes
    - Viewed (0)
  6. src/cmd/compile/internal/ssa/_gen/RISCV64.rules

    Joel Sing <******@****.***> 1707360850 +1100
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 14:57:07 UTC 2024
    - 40.3K bytes
    - Viewed (0)
  7. src/cmd/compile/internal/ssa/_gen/LOONG64.rules

    Guoqi Chen <******@****.***> 1692152533 +0800
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 21 19:26:25 UTC 2023
    - 31.8K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/_gen/MIPS.rules

    Junxian Zhu <******@****.***> 1683865731 +0800
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 24 14:43:03 UTC 2023
    - 35.3K bytes
    - Viewed (0)
  9. src/cmd/compile/internal/ssa/_gen/MIPS64.rules

    Junxian Zhu <******@****.***> 1685079225 +0800
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Jul 31 03:59:48 UTC 2023
    - 41.9K bytes
    - Viewed (0)
  10. src/cmd/compile/internal/ssa/_gen/ARM.rules

    Ludi Rehak <******@****.***> 1690680342 -0700
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Nov 20 17:19:36 UTC 2023
    - 90.1K bytes
    - Viewed (0)
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