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Results 21 - 30 of 35 for logical_or (0.29 sec)

  1. tensorflow/compiler/mlir/tensorflow/tests/canonicalize.mlir

    // CHECK: return %arg0
    }
    
    // CHECK-LABEL: testDoubleLogicalNot
    func.func @testDoubleLogicalNot(%arg0: tensor<8x16x32x64xi1>) -> tensor<8x16x32x64xi1> {
      %0 = "tf.LogicalNot"(%arg0) : (tensor<8x16x32x64xi1>) -> tensor<8x16x32x64xi1>
      %1 = "tf.LogicalNot"(%0) : (tensor<8x16x32x64xi1>) -> tensor<8x16x32x64xi1>
      func.return %1: tensor<8x16x32x64xi1>
    
    // CHECK: return %arg0
    }
    
    // CHECK-LABEL: testDoubleNeg
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu May 09 22:07:10 UTC 2024
    - 132.1K bytes
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  2. tensorflow/compiler/mlir/tf2xla/tests/legalize-tf-binary-elementwise.mlir

      func.return %0: tensor<*xi1>
    }
    
    // CHECK-LABEL: func @or
    func.func @or(%arg0: tensor<2xi1>, %arg1: tensor<2xi1>) -> tensor<2xi1> {
      // CHECK-NEXT:  mhlo.or
      %0 = "tf.LogicalOr"(%arg0, %arg1) : (tensor<2xi1>, tensor<2xi1>) -> tensor<2xi1>
      func.return %0: tensor<2xi1>
    }
    
    // CHECK-LABEL: func @bitwise_or
    func.func @bitwise_or(%arg0: tensor<4xi32>, %arg1: tensor<4xi32>) -> tensor<4xi32> {
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Sat Apr 06 15:32:52 UTC 2024
    - 18.4K bytes
    - Viewed (0)
  3. RELEASE.md

            `tf.atan2`, `tf.atanh`, `tf.cos`, `tf.cosh`, `tf.equal`, `tf.exp`,
            `tf.floor`, `tf.greater`, `tf.greater_equal`, `tf.less`,
            `tf.less_equal`, `tf.log`, `tf.logp1`, `tf.logical_and`,
            `tf.logical_not`, `tf.logical_or`, `tf.maximum`, `tf.minimum`,
            `tf.not_equal`, `tf.sin`, `tf.sinh`, `tf.tan`
        *   Deprecate `tf.data.Dataset.shard`.
        *   Deprecate `saved_model.loader.load` which is replaced by
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Jun 11 23:24:08 UTC 2024
    - 730.3K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/tensorflow/tests/region-control-flow-to-functional.mlir

    }
    
    // -----
    
    // Nested IfRegions
    // CHECK: func private @tf.IfRegion1_else
    // CHECK-NEXT: "tf.Acos"
    // CHECK-NEXT: "tf.Abs"
    
    // CHECK: func private @tf.IfRegion1_then
    // CHECK-NEXT: "tf.LogicalNot"
    // CHECK-NEXT: "tf.Asin"
    // CHECK-NEXT: "tf.If"({{.+}}) <{else_branch = @tf.IfRegion_else, {{.+}} then_branch = @tf.IfRegion_then}
    
    // CHECK: func private @tf.IfRegion_else
    // CHECK-NEXT: "tf.Neg"
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Feb 02 11:15:34 UTC 2024
    - 44.3K bytes
    - Viewed (0)
  5. tensorflow/compiler/mlir/tensorflow/tests/lower_tf.mlir

      // CHECK-DAG: %[[VAL19:.*]] = "tf.LogicalAnd"(%[[VAL13]], %[[VAL18]]) : (tensor<i1>, tensor<i1>) -> tensor<i1>
      // CHECK-DAG: %[[VAL20:.*]] = "tf.LogicalOr"(%[[VAL12]], %[[VAL19]]) : (tensor<i1>, tensor<i1>) -> tensor<i1>
      // CHECK-DAG: %[[VAL21:.*]] = "tf.AddV2"(%[[VAL10]], %[[VAL3]]) : (tensor<f32>, tensor<f32>) -> tensor<f32>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Jan 05 18:35:42 UTC 2024
    - 92K bytes
    - Viewed (0)
  6. tensorflow/compiler/jit/mark_for_compilation_pass.cc

    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Feb 21 12:19:41 UTC 2024
    - 85.3K bytes
    - Viewed (0)
  7. tensorflow/compiler/mlir/tensorflow/tests/tpu_space_to_depth_pass.mlir

        %5 = "tf.Less"(%arg2, %arg4) {device = ""} : (tensor<i32>, tensor<i32>) -> tensor<i1>
        %6 = "tf.LogicalAnd"(%1, %5) {device = ""} : (tensor<i1>, tensor<i1>) -> tensor<i1>
        %7 = "tf.LogicalOr"(%6, %4) {device = ""} : (tensor<i1>, tensor<i1>) -> tensor<i1>
        %8 = "tf.Less"(%arg0, %arg1) {device = ""} : (tensor<i32>, tensor<i32>) -> tensor<i1>
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Mon Oct 30 06:52:55 UTC 2023
    - 37.4K bytes
    - Viewed (0)
  8. tensorflow/compiler/mlir/lite/schema/schema_generated.h

        "SUM",
        "SQRT",
        "RSQRT",
        "SHAPE",
        "POW",
        "ARG_MIN",
        "FAKE_QUANT",
        "REDUCE_PROD",
        "REDUCE_MAX",
        "PACK",
        "LOGICAL_OR",
        "ONE_HOT",
        "LOGICAL_AND",
        "LOGICAL_NOT",
        "UNPACK",
        "REDUCE_MIN",
        "FLOOR_DIV",
        "REDUCE_ANY",
        "SQUARE",
        "ZEROS_LIKE",
        "FILL",
        "FLOOR_MOD",
        "RANGE",
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue May 21 18:21:50 UTC 2024
    - 1M bytes
    - Viewed (0)
  9. tensorflow/compiler/mlir/tensorflow/ir/tf_ops.td

    Placeholder for a device ordinal that depends on its tf_device.replicate ancestor.
      }];
    
      let description = [{
    This op must have a tf_device.replicate ancestor. The ancestor replica_id and
    logical_core attribute correspond to a TPU core. This op maps the TPU core to a
    device_ordinal, where the device ordinal is the index of the core relative to
    its host.
    
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Wed Apr 24 04:08:35 UTC 2024
    - 90.5K bytes
    - Viewed (0)
  10. tensorflow/compiler/mlir/tensorflow/tests/extract_outside_compilation.mlir

        // CHECK:           %[[PROGRAM0:.+]] = "tf._XlaCompileMlirPlaceholderProgramKey"
        // CHECK:           %[[DEVICE0:.+]] = "tf._TPUDeviceOrdinalPlaceholder"
        // CHECK-SAME:        logical_core = 0
        // CHECK:           %[[RECV0:.+]] = "tf._XlaRecvAtHostV2"(%[[PROGRAM0]], %[[DEVICE0]])
        // CHECK-SAME:        key = "host_compute_channel_0_args"
        // CHECK-SAME:        _xla_has_host_transfer = true
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Tue Oct 31 08:59:10 UTC 2023
    - 129.6K bytes
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