(OffPtr (OffPtr p [y]) [x]) => (OffPtr p [x+y])
(OffPtr p [0]) && v.Type.Compare(p.Type) == types.CMPeq => p

// indexing operations
// Note: bounds check has already been done
(PtrIndex <t> ptr idx) && config.PtrSize == 4 && is32Bit(t.Elem().Size()) => (AddPtr ptr (Mul32 <typ.Int> idx (Const32 <typ.Int> [int32(t.Elem().Size())])))
(PtrIndex <t> ptr idx) && config.PtrSize == 8 => (AddPtr ptr (Mul64 <typ.Int> idx (Const64 <typ.Int> [t.Elem().Size()])))

	// match: (I64AddConst [off] (LoweredAddr {sym} [off2] base))
	// cond: isU32Bit(off+int64(off2))
	// result: (LoweredAddr {sym} [int32(off)+off2] base)
	for {
		off := auxIntToInt64(v.AuxInt)
		if v_0.Op != OpWasmLoweredAddr {
			break
		}
		off2 := auxIntToInt32(v_0.AuxInt)
		sym := auxToSym(v_0.Aux)
		base := v_0.Args[0]
		if !(isU32Bit(off + int64(off2))) {
			break
		}
		v.reset(OpWasmLoweredAddr)

	rd := x & (1<<5 - 1)
	is_32bit := !has_width
	var rea RegExtshiftAmount
	if has_width {
		if option&0x3 != 0x3 {
			rea.reg = W0 + Reg(rm)
		} else {
			rea.reg = X0 + Reg(rm)
		}
	} else {
		rea.reg = W0 + Reg(rm)
	}
	switch option {
	case 0:
		rea.extShift = uxtb
	case 1:
		rea.extShift = uxth
	case 2:
		if is_32bit && (rn == 31 || (s == 0 && rd == 31)) {

	typ := &b.Func.Config.Types
	// match: (PtrIndex <t> ptr idx)
	// cond: config.PtrSize == 4 && is32Bit(t.Elem().Size())
	// result: (AddPtr ptr (Mul32 <typ.Int> idx (Const32 <typ.Int> [int32(t.Elem().Size())])))
	for {
		t := v.Type
		ptr := v_0
		idx := v_1
		if !(config.PtrSize == 4 && is32Bit(t.Elem().Size())) {
			break
		}
		v.reset(OpAddPtr)
		v0 := b.NewValue0(v.Pos, OpMul32, typ.Int)