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Results 21 - 30 of 30 for Less16 (0.23 sec)
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src/cmd/compile/internal/ssa/rewriteS390X.go
v.AddArg3(v0, v1, v2) return true } } func rewriteValueS390X_OpLess16(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] b := v.Block typ := &b.Func.Config.Types // match: (Less16 x y) // result: (LOCGR {s390x.Less} (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVHreg x) (MOVHreg y))) for { x := v_0 y := v_1 v.reset(OpS390XLOCGR) v.Aux = s390xCCMaskToAux(s390x.Less)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 12 18:09:26 UTC 2023 - 395.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM.go
v.AddArg(v0) return true } } func rewriteValueARM_OpLess16(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] b := v.Block typ := &b.Func.Config.Types // match: (Less16 x y) // result: (LessThan (CMP (SignExt16to32 x) (SignExt16to32 y))) for { x := v_0 y := v_1 v.reset(OpARMLessThan) v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 486.8K bytes - Viewed (0) -
src/runtime/asm_arm64.s
VMOV R1, V30.D[0] VMOV R2, V30.D[1] // load length into seed MOVD $runtime·aeskeysched+0(SB), R4 VLD1.P 16(R4), [V0.B16] AESE V30.B16, V0.B16 AESMC V0.B16, V0.B16 CMP $16, R2 BLO aes0to15 BEQ aes16 CMP $32, R2 BLS aes17to32 CMP $64, R2 BLS aes33to64 CMP $128, R2 BLS aes65to128 B aes129plus aes0to15: CBZ R2, aes0 VEOR V2.B16, V2.B16, V2.B16 TBZ $3, R2, less_than_8
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat May 11 20:38:24 UTC 2024 - 43.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM64.go
b := v.Block typ := &b.Func.Config.Types // match: (Less16U zero:(MOVDconst [0]) x) // result: (Neq16 zero x) for { zero := v_0 if zero.Op != OpARM64MOVDconst || auxIntToInt64(zero.AuxInt) != 0 { break } x := v_1 v.reset(OpNeq16) v.AddArg2(zero, x) return true } // match: (Less16U x (MOVDconst [1])) // result: (Eq16 x (MOVDconst [0])) for {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 608.6K bytes - Viewed (0) -
src/runtime/asm_386.s
MOVO X0, X1 // save unscrambled seed PXOR runtime·aeskeysched(SB), X0 // xor in per-process seed AESENC X0, X0 // scramble seed CMPL BX, $16 JB aes0to15 JE aes16 CMPL BX, $32 JBE aes17to32 CMPL BX, $64 JBE aes33to64 JMP aes65plus aes0to15: TESTL BX, BX JE aes0 ADDL $16, AX TESTW $0xff0, AX JE endofpage
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 15 15:45:13 UTC 2024 - 43.1K bytes - Viewed (0) -
src/runtime/asm_amd64.s
MOVO X0, X1 // save unscrambled seed PXOR runtime·aeskeysched(SB), X0 // xor in per-process seed AESENC X0, X0 // scramble seed CMPQ CX, $16 JB aes0to15 JE aes16 CMPQ CX, $32 JBE aes17to32 CMPQ CX, $64 JBE aes33to64 CMPQ CX, $128 JBE aes65to128 JMP aes129plus aes0to15: TESTQ CX, CX JE aes0 ADDQ $16, AX
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat May 11 20:38:24 UTC 2024 - 60.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteAMD64.go
v0.AddArg2(x, y) v.AddArg(v0) return true } } func rewriteValueAMD64_OpLess16(v *Value) bool { v_1 := v.Args[1] v_0 := v.Args[0] b := v.Block // match: (Less16 x y) // result: (SETL (CMPW x y)) for { x := v_0 y := v_1 v.reset(OpAMD64SETL) v0 := b.NewValue0(v.Pos, OpAMD64CMPW, types.TypeFlags) v0.AddArg2(x, y) v.AddArg(v0)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 712.7K bytes - Viewed (0) -
pkg/printers/internalversion/printers_test.go
[]metav1.TableRow{{Cells: []interface{}{"test15", "0/2", apiv1.PodReasonSchedulingGated, "0", "<unknown>"}}}, }, { // Test pod condition succeed api.Pod{ ObjectMeta: metav1.ObjectMeta{Name: "test16"}, Spec: api.PodSpec{Containers: make([]api.Container, 1)}, Status: api.PodStatus{ Phase: api.PodSucceeded, ContainerStatuses: []api.ContainerStatus{ { Ready: false,
Registered: Sat Jun 15 01:39:40 UTC 2024 - Last Modified: Tue Jun 11 14:04:15 UTC 2024 - 218.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64.rules
(Less(8U|16U|32U|64U) x (MOVDconst [1])) => (Eq(8|16|32|64) x (MOVDconst [0])) (Leq(8U|16U|32U|64U) (MOVDconst [1]) x) => (Neq(8|16|32|64) (MOVDconst [0]) x) (Less8U x y) => (LessThanU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y))) (Less16U x y) => (LessThanU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y))) (Less32U x y) => (LessThanU (CMPW x y)) (Less64U x y) => (LessThanU (CMP x y)) (Leq8 x y) => (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 113.1K bytes - Viewed (0)