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Results 11 - 20 of 36 for window_strides (0.21 sec)
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tensorflow/compiler/mlir/lite/stablehlo/transforms/legalize_hlo.cc
std::string* padding_mode, std::string* data_format) { // tf.max_pool or tf.avg_pool need at least 3 dimensions (batch, spatial, // channel). const uint64_t rank = rw.getWindowDimensions().size(); if (rank <= 3 || rank > 5) return false; if (rw.getWindowStrides().has_value()) { window_strides->insert(window_strides->end(),
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 154.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/tests/legalize_hlo.mlir
lhs_dilation = dense<1> : tensor<1xi64>, padding = dense<0> : tensor<1x2xi64>, precision_config = [#mhlo<precision DEFAULT>, #mhlo<precision DEFAULT>], rhs_dilation = dense<1> : tensor<1xi64>, window_strides = dense<1> : tensor<1xi64> } : (tensor<16x32x256xbf16>, tensor<1x256x256xbf16>) -> tensor<16x32x256xbf16> func.return %0 : tensor<16x32x256xbf16> } // CHECK-LABEL: func.func @convert_conv1d_dynamic_batch(
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed May 29 07:26:59 UTC 2024 - 340.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/tests/quantize_composite_functions_drq.mlir
// CHECK-SAME: rhs_dilation = [2, 2] // CHECK-SAME: rhs_quantization_axis = -1 : i64 // CHECK-SAME: rhs_quantization_max_val = 127 : i64 // CHECK-SAME: rhs_quantization_min_val = -128 : i64 // CHECK-SAME: window_strides = [1, 2] // CHECK-SAME: (tensor<1x2x2x3xf32>, tensor<2x3x3x2x!tf_type.qint8>, tensor<f32>, tensor<i32>) -> tensor<*xf32> // CHECK-LABEL: func private @quantized_conv2d_fn_1
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Jan 05 18:35:42 UTC 2024 - 9.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/passes/replace_cast_hacks_with_tf_xla_ops.cc
dnums.add_kernel_spatial_dimensions(i - 1); dnums.add_output_spatial_dimensions(i); } Value padding, window_strides, lhs_dilation, rhs_dilation, feature_group_count; PrepareXlaConvParams(builder, loc, strides, dilations, feature_group_cnt, /*window_strides=*/window_strides, /*lhs_dilation=*/lhs_dilation, /*rhs_dilation=*/rhs_dilation,
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 25 16:01:03 UTC 2024 - 47.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/transforms/shape_inference.cc
xla::Window window; for (size_t i = 0; i < window_dimensions.size(); i++) { auto dim = window.add_dimensions(); dim->set_size(window_dimensions[i]); if (!window_strides.empty()) { dim->set_stride(window_strides[i]); } else { dim->set_stride(1); } if (!padding.empty()) { dim->set_padding_low(padding[i].first); dim->set_padding_high(padding[i].second);
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Jun 08 07:28:49 UTC 2024 - 134.1K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/stablehlo/tests/pipelines/process_nchw_tensor.mlir
^bb0(%arg1: tensor<f32>, %arg2: tensor<f32>): %6 = stablehlo.maximum %arg1, %arg2 : tensor<f32> stablehlo.return %6 : tensor<f32> }) { window_dimensions = array<i64: 1, 1, 2, 2>, window_strides = array<i64: 1, 1, 2, 2> } : (tensor<1x4x5x5xf32>, tensor<f32>) -> tensor<1x4x2x2xf32> return %4 : tensor<1x4x2x2xf32> } // CHECK-DAG: %[[WEIGHT_CONST:.+]] = stablehlo.constant {{.*}} : tensor<3x3x2x4xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Apr 18 20:32:46 UTC 2024 - 12.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf.cc
} auto rhs_dilations_attr = rewriter.getNamedAttr( "rhs_dilation", GetI64ElementsAttr(rhs_dilations, &rewriter)); auto window_strides_attr = rewriter.getNamedAttr( "window_strides", GetI64ElementsAttr(window_strides, &rewriter)); auto dimension_numbers_attr = GetConvDimensionNumbersAttr( spatial_dim_indices, data_format, &rewriter); const int64_t input_channels =
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 11 20:00:43 UTC 2024 - 291.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/stablehlo/transforms/uniform_quantized_stablehlo_to_tfl_pass.cc
// Use NHWC format. int32_t stride_h = 1; int32_t stride_w = 1; std::optional<ArrayRef<int64_t>> window_strides = op.getWindowStrides(); if (window_strides.has_value()) { stride_h = CastI64ToI32((*window_strides)[1]).value(); stride_w = CastI64ToI32((*window_strides)[2]).value(); } auto stride_h_attr = IntegerAttr::get(rewriter.getI32Type(), stride_h);
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Apr 22 09:00:19 UTC 2024 - 99.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/flatbuffer2mlir/vhlo.mlir
window_reversal = #vhlo.tensor_v1<dense<false> : tensor<2xi1>>, window_strides = #vhlo.tensor_v1<dense<1> : tensor<2xi64>>}> : (tensor<1x1x1600x32xf32>, tensor<1x13x1x32xf32>) -> tensor<1x1x1600x32xf32> return %0 : tensor<1x1x1600x32xf32> }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Mar 14 19:15:40 UTC 2024 - 31.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/passes/quantized_function_library_uniform_quantized.mlir
%input_scale, %input_zp, %filter_scale, %filter_zp, %out_scale, %out_zp) { Tin = "tfdtype$DT_QINT8", Tout = "tfdtype$DT_QINT32", window_strides = [1, 1], padding = "SAME", explicit_padding = [], lhs_dilation = [], rhs_dilation = [], batch_group_count = 1, feature_group_count = 1,
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Aug 29 01:13:58 UTC 2023 - 19.3K bytes - Viewed (0)