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Results 11 - 20 of 26 for uleb (0.06 sec)
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tensorflow/compiler/mlir/tfr/python/tfr_gen_test.py
CHECK-NEXT: %{{.*}} = arith.cmpi "eq", %x, %y : i64 CHECK-NEXT: %{{.*}} = arith.cmpi "ult", %x, %y : i64 CHECK-NEXT: %{{.*}} = arith.cmpi "ule", %x, %y : i64 CHECK-NEXT: %{{.*}} = arith.cmpi "ugt", %x, %y : i64 CHECK-NEXT: %{{.*}} = arith.cmpi "uge", %x, %y : i64 CHECK-NEXT: %{{.*}} = arith.cmpi "ne", %x, %y : i64
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Oct 13 16:33:28 UTC 2021 - 28.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewrite386.go
} // match: (ULE (FlagLT_ULT) yes no) // result: (First yes no) for b.Controls[0].Op == Op386FlagLT_ULT { b.Reset(BlockFirst) return true } // match: (ULE (FlagLT_UGT) yes no) // result: (First no yes) for b.Controls[0].Op == Op386FlagLT_UGT { b.Reset(BlockFirst) b.swapSuccessors() return true } // match: (ULE (FlagGT_ULT) yes no)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 21:05:46 UTC 2023 - 262.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM.go
} case BlockARMULE: // match: (ULE (FlagConstant [fc]) yes no) // cond: fc.ule() // result: (First yes no) for b.Controls[0].Op == OpARMFlagConstant { v_0 := b.Controls[0] fc := auxIntToFlagConstant(v_0.AuxInt) if !(fc.ule()) { break } b.Reset(BlockFirst) return true } // match: (ULE (FlagConstant [fc]) yes no) // cond: !fc.ule()
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 486.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewrite.go
case OpARM64GreaterThan: return b2i(fc.gt()) case OpARM64GreaterThanU: return b2i(fc.ugt()) case OpARM64LessEqual: return b2i(fc.le()) case OpARM64LessEqualU: return b2i(fc.ule()) case OpARM64GreaterEqual: return b2i(fc.ge()) case OpARM64GreaterEqualU: return b2i(fc.uge()) } return 0 } // logRule logs the use of the rule s. This will only be enabled if
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 64.2K bytes - Viewed (0) -
src/cmd/go/internal/modfetch/zip_sum_test/testdata/zip_sums.csv
leb.io/aeshash,v0.0.0-20190627052759-9e6b40329b3b,h1:MG17Tc0pA3XmFTsPwklMMEfcos3pTFnVYM4A0YfVSbU=,a78b48ac18e98ea68dacce16cd94c9074688a0b125f824f047313a33b264ea88 leb.io/hashland,v0.0.0-20171003003232-07375b562dea,h1:s9IkzZTqYqw77voO6taUZHc0C1B096h4T/kQtujGApE=,0698177f24cbde0a7b45495e7fe976fe7623f2b9205995b7d91fd2e7b0f0e243
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 18 17:29:01 UTC 2020 - 334.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARMOps.go
{name: "NE", controls: 1}, {name: "LT", controls: 1}, {name: "LE", controls: 1}, {name: "GT", controls: 1}, {name: "GE", controls: 1}, {name: "ULT", controls: 1}, {name: "ULE", controls: 1}, {name: "UGT", controls: 1}, {name: "UGE", controls: 1}, {name: "LTnoov", controls: 1}, // 'LT' but without honoring overflow {name: "LEnoov", controls: 1}, // 'LE' but without honoring overflow
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 24 00:21:13 UTC 2023 - 41K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfr/python/tfr_gen.py
rhs, rhs_ty = self.visit(right) if isinstance(op, ast.Eq): pred = 'eq' elif isinstance(op, ast.Lt): pred = 'ult' elif isinstance(op, ast.LtE): pred = 'ule' elif isinstance(op, ast.Gt): pred = 'ugt' elif isinstance(op, ast.GtE): pred = 'uge' elif isinstance(op, ast.NotEq): pred = 'ne' else:
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Apr 27 15:27:03 UTC 2022 - 55.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM64.go
} case BlockARM64ULE: // match: (ULE (FlagConstant [fc]) yes no) // cond: fc.ule() // result: (First yes no) for b.Controls[0].Op == OpARM64FlagConstant { v_0 := b.Controls[0] fc := auxIntToFlagConstant(v_0.AuxInt) if !(fc.ule()) { break } b.Reset(BlockFirst) return true } // match: (ULE (FlagConstant [fc]) yes no) // cond: !fc.ule()
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 608.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/386Ops.go
{name: "LE", controls: 1}, {name: "GT", controls: 1}, {name: "GE", controls: 1}, {name: "OS", controls: 1}, {name: "OC", controls: 1}, {name: "ULT", controls: 1}, {name: "ULE", controls: 1}, {name: "UGT", controls: 1}, {name: "UGE", controls: 1}, {name: "EQF", controls: 1}, {name: "NEF", controls: 1}, {name: "ORD", controls: 1}, // FP, ordered comparison (parity zero)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 14 08:10:32 UTC 2023 - 45.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64Ops.go
{name: "NE", controls: 1}, {name: "LT", controls: 1}, {name: "LE", controls: 1}, {name: "GT", controls: 1}, {name: "GE", controls: 1}, {name: "ULT", controls: 1}, {name: "ULE", controls: 1}, {name: "UGT", controls: 1}, {name: "UGE", controls: 1}, {name: "Z", controls: 1}, // Control == 0 (take a register instead of flags)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 58.8K bytes - Viewed (0)