}
  auto mins = tensor.quantization->min;
  auto maxs = tensor.quantization->max;
  if (mins.size() != maxs.size() || mins.empty()) return nullptr;

  llvm::SmallVector<llvm::APFloat, 4> min_maxs;
  min_maxs.reserve(mins.size() * 2);
  for (int i = 0, end = mins.size(); i < end; ++i) {
    llvm::APFloat min(mins[i]);
    llvm::APFloat max(maxs[i]);
    min_maxs.push_back(min);
    min_maxs.push_back(max);
  }

	FADDS	F1, F0, F2				// 53011000
	FSUBS	F1, F0, F2				// 53011008
	FMULS	F1, F0, F2				// 53011010
	FDIVS	F1, F0, F2				// 53011018
	FMINS	F1, F0, F2				// 53011028
	FMAXS	F1, F0, F2				// 53111028
	FSQRTS	F0, F1					// d3000058

	// 11.7: Single-Precision Floating-Point Conversion and Move Instructions
	FCVTWS	F0, X5					// d31200c0
	FCVTWS.RNE	F0, X5				// d30200c0

  float rmin, rmax;
  if (&semantics == &APFloat::IEEEsingle()) {
    rmin = op.getMin().convertToFloat();
    rmax = op.getMax().convertToFloat();
  } else {
    rmin = op.getMin().convertToDouble();
    rmax = op.getMax().convertToDouble();
  }
  // Range boundaries must be valid.
  if (rmin >= rmax) {

                 element_type)) {
    std::vector<float> mins = {static_cast<float>(qtype.getMin())};
    std::vector<float> maxs = {static_cast<float>(qtype.getMax())};
    q_params = tflite::CreateQuantizationParameters(
        builder_, builder_.CreateVector<float>(mins),
        builder_.CreateVector<float>(maxs));
  }
  return tflite::CreateTensor(
      builder_, builder_.CreateVector(shape), tflite_element_type,

		{name: "FLES", argLength: 2, reg: fp2gp, asm: "FLES"},                                                                               // arg0 <= arg1
		{name: "LoweredFMAXS", argLength: 2, reg: fp21, resultNotInArgs: true, asm: "FMAXS", commutative: true, typ: "Float32"},             // max(arg0, arg1)
		{name: "LoweredFMINS", argLength: 2, reg: fp21, resultNotInArgs: true, asm: "FMINS", commutative: true, typ: "Float32"},             // min(arg0, arg1)

		{name: "FMAXD", argLength: 2, reg: fp21, asm: "FMAXD"},                                // max(arg0, arg1)
		{name: "FMAXS", argLength: 2, reg: fp21, asm: "FMAXS"},                                // max(arg0, arg1)
		{name: "REV", argLength: 1, reg: gp11, asm: "REV"},                                    // byte reverse, 64-bit

	FDIVD F11, F25, F30                        // 3e1b6b1e
	FMADDS F15, F2, F8, F1                     // 01090f1f
	FMADDD F15, F21, F25, F9                   // 29574f1f
	//TODO VFMAX V23.D2, V27.D2, V14.D2        // 6ef7774e
	FMAXS F5, F28, F27                         // 9b4b251e
	FMAXD F12, F31, F31                        // ff4b6c1e
	//TODO VFMAXNM V3.D2, V12.D2, V27.D2       // 9bc5634e
	FMAXNMS F11, F24, F12                      // 0c6b2b1e

				{0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31
			},
		},
	},
	{
		name:   "FMAXS",
		argLen: 2,
		asm:    arm64.AFMAXS,
		reg: regInfo{
			inputs: []inputInfo{