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Results 11 - 20 of 233 for r6 (0.05 sec)

  1. src/internal/runtime/atomic/atomic_ppc64x.s

    	MOVD	ptr+0(FP), R3
    	MOVBZ	val+8(FP), R4
    	LWSYNC
    again:
    	LBAR	(R3), R6
    	OR	R4, R6
    	STBCCC	R6, (R3)
    	BNE	again
    	RET
    
    // void ·And8(byte volatile*, byte);
    TEXT ·And8(SB), NOSPLIT, $0-9
    	MOVD	ptr+0(FP), R3
    	MOVBZ	val+8(FP), R4
    	LWSYNC
    again:
    	LBAR	(R3), R6
    	AND	R4, R6
    	STBCCC	R6, (R3)
    	BNE	again
    	RET
    
    // func Or(addr *uint32, v uint32)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 25 19:53:03 UTC 2024
    - 7.5K bytes
    - Viewed (0)
  2. src/internal/bytealg/index_arm64.s

    len_8:
    	// R5 contains 8-byte of sep
    	MOVD	(R2), R5
    loop_8:
    	// R6 contains substring for comparison
    	CMP	R4, R0
    	BHI	not_found
    	MOVD.P	1(R0), R6
    	CMP	R5, R6
    	BNE	loop_8
    	B	found
    len_2_7:
    	TBZ	$2, R3, len_2_3
    	TBZ	$1, R3, len_4_5
    	TBZ	$0, R3, len_6
    len_7:
    	// R5 and R6 contain 7-byte of sep
    	MOVWU	(R2), R5
    	// 1-byte overlap with R5
    	MOVWU	3(R2), R6
    loop_7:
    	CMP	R4, R0
    	BHI	not_found
    	MOVWU.P	1(R0), R3
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Aug 23 15:54:07 UTC 2018
    - 3.9K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/arm64error.s

    	LDADDALW	R5, (R6), RSP                            // ERROR "illegal combination"
    	LDADDALH	R5, (R6), RSP                            // ERROR "illegal combination"
    	LDADDALB	R5, (R6), RSP                            // ERROR "illegal combination"
    	LDADDD	R5, (R6), RSP                                    // ERROR "illegal combination"
    	LDADDW	R5, (R6), RSP                                    // ERROR "illegal combination"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Dec 08 03:28:17 UTC 2023
    - 37.8K bytes
    - Viewed (0)
  4. src/internal/bytealg/indexbyte_arm64.s

    	SUB	$0x20, R4, R4
    	NEG	R4<<1, R4
    	LSL	R4, R6, R6
    	LSR	R4, R6, R6
    
    tail:
    	// Check that we have found a character
    	CBZ	R6, fail
    	// Count the trailing zeros using bit reversing
    	RBIT	R6, R6
    	// Compensate the last post-increment
    	SUB	$0x20, R3, R3
    	// And count the leading zeros
    	CLZ	R6, R6
    	// R6 is twice the offset into the fragment
    	ADD	R6>>1, R3, R0
    	// Compute the offset result
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Nov 08 20:52:47 UTC 2018
    - 3.3K bytes
    - Viewed (0)
  5. src/runtime/memmove_mips64x.s

    	SUBVU	R6, R2, R4
    	AND	$7, R4
    	BNE	R4, out1
    
    	// if less than 8 bytes, do byte copying
    	SGTU	$8, R3, R4
    	BNE	R4, out1
    
    	// do one byte at a time until 8-aligned
    	AND	$7, R6, R5
    	BEQ	R5, words1
    	ADDV	$-1, R2
    	MOVB	(R2), R4
    	ADDV	$-1, R6
    	MOVB	R4, (R6)
    	JMP	-6(PC)
    
    words1:
    	// do 8 bytes at a time if there is room
    	ADDV	$7, R1, R3 // R3 is start pointer+7
    
    	SGTU	R6, R3, R5
    	BEQ	R5, out1
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Nov 06 10:24:44 UTC 2021
    - 1.8K bytes
    - Viewed (0)
  6. src/cmd/asm/internal/asm/testdata/loong64enc1.s

    	MULU	R4, R5, R6		// a6101c00
    	MULH	R4, R5	   		// a5901c00
    	MULH	R4, R5, R6	   	// a6901c00
    	MULHU	R4, R5			// a5101d00
    	MULHU	R4, R5, R6		// a6101d00
    	REM	R4, R5	  		// a5902000
    	REM	R4, R5, R6	  	// a6902000
    	REMU	R4, R5	   		// a5902100
    	REMU	R4, R5, R6	   	// a6902100
    	DIV	R4, R5	  		// a5102000
    	DIV	R4, R5, R6	  	// a6102000
    	DIVU	R4, R5	   		// a5102100
    	DIVU	R4, R5, R6	   	// a6102100
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 8.2K bytes
    - Viewed (0)
  7. src/internal/runtime/atomic/atomic_loong64.s

    	MOVV	ptr+0(FP), R4
    	MOVW	delta+8(FP), R5
    	DBAR
    	LL	(R4), R6
    	ADDU	R6, R5, R7
    	MOVV	R7, R6
    	SC	R7, (R4)
    	BEQ	R7, -4(PC)
    	MOVW	R6, ret+16(FP)
    	DBAR
    	RET
    
    TEXT ·Xadd64(SB), NOSPLIT, $0-24
    	MOVV	ptr+0(FP), R4
    	MOVV	delta+8(FP), R5
    	DBAR
    	LLV	(R4), R6
    	ADDVU	R6, R5, R7
    	MOVV	R7, R6
    	SCV	R7, (R4)
    	BEQ	R7, -4(PC)
    	MOVV	R6, ret+16(FP)
    	DBAR
    	RET
    
    TEXT ·Xchg(SB), NOSPLIT, $0-20
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 25 19:53:03 UTC 2024
    - 6.3K bytes
    - Viewed (0)
  8. src/runtime/memmove_loong64.s

    	ADDV	$-7, R9, R6 // R6 is end pointer-7
    
    	PCALIGN	$16
    	SGTU	R6, R4, R8
    	BEQ	R8, out
    	MOVV	(R5), R7
    	ADDV	$8, R5
    	MOVV	R7, (R4)
    	ADDV	$8, R4
    	JMP	-6(PC)
    
    out:
    	BEQ	R4, R9, done
    	MOVB	(R5), R7
    	ADDV	$1, R5
    	MOVB	R7, (R4)
    	ADDV	$1, R4
    	JMP	-5(PC)
    done:
    	RET
    
    backward:
    	ADDV	R6, R5 // from-end pointer
    	ADDV	R4, R6, R9 // to-end pointer
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 13 15:04:25 UTC 2024
    - 1.8K bytes
    - Viewed (0)
  9. src/internal/bytealg/compare_arm.s

    // R7 points to return value (-1/0/1 will be written here)
    //
    // On exit:
    // R4, R5, R6 and R8 are clobbered
    TEXT cmpbody<>(SB),NOSPLIT|NOFRAME,$0-0
    	CMP	R2, R3
    	BEQ	samebytes
    	CMP 	R0, R1
    	MOVW 	R0, R6
    	MOVW.LT	R1, R6		// R6 is min(R0, R1)
    
    	CMP	$0, R6
    	BEQ	samebytes
    	CMP	$4, R6
    	ADD	R2, R6		// R2 is current byte in a, R6 is the end of the range to compare
    	BLT	byte_loop	// length < 4
    	AND	$3, R2, R8
    	CMP	$0, R8
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 06 16:09:38 UTC 2019
    - 1.8K bytes
    - Viewed (0)
  10. src/cmd/asm/internal/asm/testdata/arm64.s

    	LDADDLD	R5, (R6), ZR                         // df0065f8
    	LDADDLW	R5, (R6), ZR                         // df0065b8
    	LDADDLH	R5, (R6), ZR                         // df006578
    	LDADDLB	R5, (R6), ZR                         // df006538
    	LDCLRD	R5, (R6), ZR                         // df1025f8
    	LDCLRW	R5, (R6), ZR                         // df1025b8
    	LDCLRH	R5, (R6), ZR                         // df102578
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Dec 08 03:28:17 UTC 2023
    - 94.9K bytes
    - Viewed (0)
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