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CHANGELOG/CHANGELOG-1.2.md
change. More details [here](https://docs.influxdata.com/influxdb/v0.9/administration/upgrading/). * We have renamed “minions” to “nodes”. If you were specifying NUM\_MINIONS or MINION\_SIZE to kube-up, you should now specify NUM\_NODES or NODE\_SIZE. ### Known Issues * Paused deployments can't be resized and don't clean up old ReplicaSets. * Minimum memory limit is 4MB. This is a docker limitation
Created: Fri Dec 26 09:05:12 GMT 2025 - Last Modified: Fri Dec 04 06:36:19 GMT 2020 - 41.4K bytes - Click Count (0) -
src/cmd/asm/internal/arch/arch.go
for i, s := range obj.Anames { instructions[s] = obj.As(i) } for i, s := range ppc64.Anames { if obj.As(i) >= obj.A_ARCHSPECIFIC { instructions[s] = obj.As(i) + obj.ABasePPC64 } } // The opcodes generated by x/arch's ppc64map are listed in // a separate slice, add them too. for i, s := range ppc64.GenAnames { instructions[s] = obj.As(i) + ppc64.AFIRSTGEN } // Annoying aliases.Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Thu Nov 13 12:17:37 GMT 2025 - 21.7K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/ppc64.s
XOR $1234567, R5, R3 // 6ca300126863d687 XORIS $15, R3, R4 // 6c64000f XOR $983040, R3, R4 // 6c64000f // TODO: cleanup inconsistency of printing CMPx opcodes with explicit CR arguments. CMP R3, R4 // 7c232000 CMP R3, R0 // 7c230000 CMP R3, R0, CR1 // CMP R3,CR1,R0 // 7ca30000
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Thu Nov 21 18:27:17 GMT 2024 - 51.7K bytes - Click Count (0) -
doc/asm.html
</p> <h3 id="riscv64">RISCV64</h3> <p> Reference: <a href="/pkg/cmd/internal/obj/riscv">Go RISCV64 Assembly Instructions Reference Manual</a> </p> <h3 id="unsupported_opcodes">Unsupported opcodes</h3> <p> The assemblers are designed to support the compiler so not all hardware instructions are defined for all architectures: if the compiler doesn't generate it, it might not be there.
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Fri Nov 14 19:09:46 GMT 2025 - 36.5K bytes - Click Count (0) -
lib/fips140/v1.0.0-c2097c7c.zip
code is governed by a BSD-style // license that can be found in the LICENSE file. //go:build !purego #include "textflag.h" // This is a port of the s390x asm implementation. // to ppc64le. // Some changes were needed due to differences in // the Go opcodes and/or available instructions // between s390x and ppc64le. // 1. There were operand order differences in the // VSUBUQM, VSUBCUQ, and VSEL instructions. // 2. ppc64 does not have a multiply high and low // like s390x, so those were implemented using...
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Thu Sep 25 19:53:19 GMT 2025 - 642.7K bytes - Click Count (0) -
lib/fips140/v1.1.0-rc1.zip
code is governed by a BSD-style // license that can be found in the LICENSE file. //go:build !purego #include "textflag.h" // This is a port of the s390x asm implementation. // to ppc64le. // Some changes were needed due to differences in // the Go opcodes and/or available instructions // between s390x and ppc64le. // 1. There were operand order differences in the // VSUBUQM, VSUBCUQ, and VSEL instructions. // 2. ppc64 does not have a multiply high and low // like s390x, so those were implemented using...
Created: Tue Dec 30 11:13:12 GMT 2025 - Last Modified: Thu Dec 11 16:27:41 GMT 2025 - 663K bytes - Click Count (0)