0 MOVD R5, R12 AND $-2, R12 CMPBGE R5, $2, A6 BR E6 A6: MOVD (R8)(R1*1), R6 MULHDU R9, R6 MOVD (R2)(R1*1), R10 ADDC R10, R11 // add to low order bits ADDE R0, R6 ADDC R4, R11 ADDE R0, R6 MOVD R6, R4 MOVD R11, (R2)(R1*1) MOVD (8)(R8)(R1*1), R6 MULHDU R9, R6 MOVD (8)(R2)(R1*1), R10 ADDC R10, R11 // add to low order bits ADDE R0, R6 ADDC R4, R11 ADDE R0, R6 MOVD R6, R4 MOVD R11, (8)(R2)(R1*1) ADD $16, R1 // i*8 + 8 ADD $2, R7 // i++ CMPBLT R7, R12, A6 BR E6 L6: // TODO: drop unused single-step loop....

BRC $8, L_bx0 L_bx1: VLEG $1, 0(R2), V2 VZERO V4 TMLL R4, $2 BRC $7, L_b11 L_b01: MOVD $-24, R4 MOVD R6, R0 MOVD 0(R3), R7 MLGR R5, R6 ADDC R0, R7 MOVD $0, R0 ADDE R0, R6 VLVGG $1, R7, V4 VAQ V2, V4, V2 VSTEG $1, V2, 0(R2) VMRHG V2, V2, V2 CMPBEQ R10, $0, L_1 BR L_cj0 L_b11: MOVD $-8, R4 MOVD 0(R3), R9 MLGR R5, R8 ADDC R6, R9 MOVD $0, R6 ADDE R6, R8 VLVGG $1, R9, V4 VAQ V2, V4, V2 VSTEG $1, V2, 0(R2) VMRHG V2, V2, V2 BR L_cj1 L_bx0: TMLL R4, $2 BRC $7, L_b10 L_b00: MOVD $-32, R4 L_cj0: MOVD 32(R3)(R4),...