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RELEASE.md
* Fixes a missing validation which causes denial of service via `Conv3DBackpropFilterV2` ([CVE-2022-29196](https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2022-29196)) * Fixes a `CHECK` failure in depthwise ops via overflows ([CVE-2021-41197](https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2021-41197))
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 11 23:24:08 UTC 2024 - 730.3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tf-ops.mlir
^bb0(%arg0: tensor<256x32x32x3xf32>, %arg1: tensor<3x3x3x4xf32>) : %0 = "tf.DepthwiseConv2dNative"(%arg0, %arg1) {device = "", name = "MobilenetV2/expanded_conv/depthwise/depthwise", T = "tfdtype$DT_FLOAT", data_format = "NHWC", dilations = [1, 1, 1, 1], padding = "SAME", strides = [1, 1, 1, 1]} : (tensor<256x32x32x3xf32>, tensor<3x3x3x4xf32>) -> tensor<256x30x30x12xf32>
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 23 14:40:35 UTC 2023 - 236.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tf2xla/transforms/legalize_tf.cc
const int64_t filter_channels = GetDimSize(filter_ty, num_spatial_dims); // TensorFlow convolution op verifies that the number of input channels is // divisible by the number of filter channels. // For depthwise convolution the feature_group_count argument would be set // to the input feature dimension. const int64_t feature_group_count = depthwise_conv ? input_channels : input_channels / filter_channels;
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 11 20:00:43 UTC 2024 - 291.8K bytes - Viewed (0) -
tensorflow/compiler/mlir/quantization/tensorflow/python/integration_test/quantize_model_test.py
shape=[ tensor_shape_pb2.TensorShapeProto( dim=[ tensor_shape_pb2.TensorShapeProto.Dim( # Depthwise conv is reshaped to [H,W,1,CxM]. size=filter_shape[quantized_axis] * filter_shape[2] ) ]
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri May 17 03:36:50 UTC 2024 - 235.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/ir/tfl_ops.td
); let results = (outs TFL_TensorOf<[F32, I32, I64]>:$output); let hasOptions = 1; } def TFL_DepthwiseConv2DOp : TFL_ConvOp<"depthwise_conv_2d", "Depthwise-separable convolution", 3, [DeclareOpInterfaceMethods<TFL_ArithmeticCount>, DynamicRangeQuantizedOpInterface]> { let arguments = ( ins TFL_TensorOf<[F32, QI8, QUI8, QI16]>:$input,
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu Jun 06 19:09:08 UTC 2024 - 186K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/ir/tf_generated_ops.td
); TF_DerivedOperandTypeAttr T = TF_DerivedOperandTypeAttr<0>; } def TF_DepthwiseConv2dNativeOp : TF_Op<"DepthwiseConv2dNative", [Pure]> { let summary = [{ Computes a 2-D depthwise convolution given 4-D `input` and `filter` tensors. }]; let description = [{ Given an input tensor of shape `[batch, in_height, in_width, in_channels]` and a filter / kernel tensor of shape
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 11 23:24:08 UTC 2024 - 793K bytes - Viewed (0)