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Results 11 - 20 of 506 for _arg0 (0.04 sec)
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tensorflow/compiler/mlir/tensorflow/tests/remove_unused_while_results.mlir
// CHECK-LABEL: result_used_in_cond // CHECK: tf.WhileRegion // CHECK-SAME: (%[[ARG0:[a-zA-Z0-9_]+]], %[[ARG1:[a-zA-Z0-9_]+]]) // CHECK: ^bb0 // CHECK: (%[[CARG0:[a-zA-Z0-9_]+]]: tensor<*xf32>, %[[CARG1:[a-zA-Z0-9_]+]]: tensor<*xf32>) // CHECK: tf.OpA // CHECK: ^bb0 // CHECK: (%[[BARG0:[a-zA-Z0-9_]+]]: tensor<*xf32>, %[[BARG1:[a-zA-Z0-9_]+]]: tensor<*xf32>) // CHECK: tf.OpB
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Sep 21 20:25:31 UTC 2022 - 8.5K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/tensor_list_ops_decomposition.mlir
%push = "tf.TensorListPushBack"(%arg0, %elem) : (tensor<!tf_type.variant<tensor<f32>>>, tensor<f32>) -> tensor<!tf_type.variant<tensor<f32>>> // CHECK: return %[[UPDATE]], %[[ADD]] func.return %push : tensor<!tf_type.variant<tensor<f32>>> } // CHECK: func @if_else(%[[EARG0:.*]]: tensor<10xf32>, %[[EARG1:.*]]: tensor<1xi32>) -> (tensor<10xf32>, tensor<1xi32>)
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 38.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/while_licm.mlir
// CHECK: while_1([[ARG0:%[^ :]*]]: tensor<i32>, [[ARG1:%[^ :]*]]: tensor<1xf32>) func.func @while_1(%arg0: tensor<i32>, %arg1: tensor<1xf32>) -> tensor<1xf32> { // CHECK: [[CST:%[^ ]*]] = arith.constant dense<1> : tensor<i32> // CHECK: "tf.WhileRegion"([[ARG0]], [[ARG1]]) // CHECK: (tensor<i32>, tensor<1xf32>) -> (tensor<i32>, tensor<1xf32>) %0:2 = "tf.WhileRegion"(%arg0, %arg1) ( // cond {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Wed Mar 30 03:28:59 UTC 2022 - 3K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/freeze_variables.mlir
} // CHECK: func private @f_callee_callee(%arg0: tensor<*x!tf_type.resource>) -> tensor<0xf32> func.func private @f_callee_callee(%arg0: tensor<*x!tf_type.resource>) -> tensor<0xf32> { %val = "tf.ReadVariableOp"(%arg0) : (tensor<*x!tf_type.resource>) -> tensor<0xf32> %0 = "tf.AddV2"(%val, %val) : (tensor<0xf32>, tensor<0xf32>) -> tensor<0xf32> "tf.AssignVariableOp"(%arg0, %0) : (tensor<*x!tf_type.resource>, tensor<0xf32>) -> ()
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Mon Oct 30 06:52:55 UTC 2023 - 23.6K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/resource-device-inference.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue May 17 16:01:45 UTC 2022 - 18.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/canonicalize.mlir
%0 = "tf.Bitcast"(%arg0) : (tensor<8x16x32x64xf32>) -> tensor<8x16x32x64xf32> // CHECK: return %arg0 func.return %0: tensor<8x16x32x64xf32> } // CHECK-LABEL: testDifferentBitcastType func.func @testDifferentBitcastType(%arg0: tensor<8x16x32x64xf32>) -> tensor<8x16x32x64xi32> {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 09 22:07:10 UTC 2024 - 132.1K bytes - Viewed (0) -
tensorflow/compiler/jit/rearrange_function_argument_pass_test.cc
// Build the XLA computation graph. // "arg0" (T=DT_RESOURCE), "arg1" (T=DT_INT32) // "arg0", "arg1" -> "if" (If) -> "ret0", "ret1" // "arg0", "arg1" -> "while" (While) -> "ret2", "ret3" tensorflow::Scope s = tensorflow::Scope::NewRootScope(); Output arg0 = ops::_Arg(s.WithOpName("arg0"), DT_RESOURCE, 0); Output arg1 = ops::_Arg(s.WithOpName("arg1"), DT_BOOL, 1); NameAttrList f; f.set_name("f1");
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Feb 09 11:36:41 UTC 2024 - 10.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPSOps.go
{name: "ADDF", argLength: 2, reg: fp21, asm: "ADDF", commutative: true}, // arg0 + arg1 {name: "ADDD", argLength: 2, reg: fp21, asm: "ADDD", commutative: true}, // arg0 + arg1 {name: "SUBF", argLength: 2, reg: fp21, asm: "SUBF"}, // arg0 - arg1 {name: "SUBD", argLength: 2, reg: fp21, asm: "SUBD"}, // arg0 - arg1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 14:43:03 UTC 2023 - 24K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/mlir2graphdef/graph-as-function.mlir
// CHECK-NEXT: name: "args_0" // CHECK-NEXT: op: "_Arg" // CHECK: i: 0 // CHECK: node { // CHECK-NEXT: name: "args_1" // CHECK-NEXT: op: "_Arg" // CHECK: i: 1 // CHECK: node { // CHECK-NEXT: name: "args_2" // CHECK-NEXT: op: "_Arg" // CHECK: i: 2 // CHECK: node { // CHECK-NEXT: name: "args_3" // CHECK-NEXT: op: "_Arg" // CHECK: i: 3 // CHECK: node {
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Mar 25 12:28:56 UTC 2022 - 3.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPS64Ops.go
{name: "MULV", argLength: 2, reg: gp2hilo, asm: "MULV", commutative: true, typ: "(Int64,Int64)"}, // arg0 * arg1, signed, results hi,lo {name: "MULVU", argLength: 2, reg: gp2hilo, asm: "MULVU", commutative: true, typ: "(UInt64,UInt64)"}, // arg0 * arg1, unsigned, results hi,lo {name: "DIVV", argLength: 2, reg: gp2hilo, asm: "DIVV", typ: "(Int64,Int64)"}, // arg0 / arg1, signed, results hi=arg0%arg1,lo=arg0/arg1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 03:36:31 UTC 2023 - 25.5K bytes - Viewed (0)